Method for making light emitting diodes

• US 9,178,113 B2
• Filed: 12/27/2012
• Issued: 11/03/2015
• Est. Priority Date: 03/30/2012
• Status: Active Grant

• Current Assignee: Hon Hai Precision Industry Co., Ltd., Tsinghua University
• Original Assignee: Hon Hai Precision Industry Co., Ltd., Tsinghua University
• Inventors: Jin, Yuan-Hao, Li, Qun-Qing, Fan, Shou-Shan
• Primary Examiner(s): Sengdara, Vongsavanh
• Assistant Examiner(s): Vuong, Thai T
• Application Number:
  US13/728,018
• Publication Number:
  US 20130260491A1
• Time in Patent Office: 1,041 Days
• Field of Search: 438/29, 438/98, 438/99, 438/13, 438/88, 438/27, 438/22, 257/E27.133, 257/E31.127, 257/13, 257/98, 257/99
• US Class Current: 1/1
• CPC Class Codes: H01L 2933/0083 Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

A method for making a LED comprises following steps. A substrate having a first surface and a second surface is provided. A patterned mask layer is applied on a first surface. A number of three-dimensional nano-structures are formed on the first surface and the patterned mask layer is removed. A first semiconductor layer, an active layer and a second semiconductor layer are formed on the second surface. A first electrode and a second electrode are formed to electrically connect with the first semiconductor layer and the second semiconductor pre-layer respectively.

Claims

1. A method for making a light emitting diode, comprising steps of:

providing a substrate having a first surface and a second surface;

applying a patterned mask layer on the first surface, wherein the patterned mask layer comprises a plurality of linear walls aligned side by side, and a groove is defined between each adjacent linear walls to form an exposed portion of the first surface;

etching the exposed portion and removing the patterned mask layer to form a plurality of three-dimensional structures, wherein the exposed portion is etched along a first etching direction to form two sidewalls in the substrate covered by the plurality of linear walls, the two sidewalls are etched along a second etching direction, the first etching direction is perpendicular to first surface of the substrate, and the second etching direction is paralleled to first surface of the substrate, the plurality of three-dimensional structures are linear protruding structures, a cross-section of each linear protruding structure is an are, and the patterned mask layer remains during the step of etching the exposed portion;

forming a first semiconductor layer, an active layer, and a second semiconductor layer on the second surface;

electrically contacting a first electrode with the first semiconductor layer; and

applying a second electrode to cover a second semiconductor layer surface at a distance from the active layer.

2. The method of claim 1, wherein the plurality of linear walls are uniformly distributed in the patterned mask layer to form an array.

3. The method of claim 2, wherein the plurality of linear walls in the array are substantially equidistantly arranged, concentric circularly arranged, or concentric rectangularly arranged.

4. The method of claim 1, wherein the plurality of linear walls are arranged in a straight line, a curvy line, or a polygonal line.

5. The method of claim 1, wherein a width of the plurality of linear walls ranges from about 200 nm to about 1000 nm, and a distance between adjacent linear walls ranges from about 10 nm to about 1000 nm.

6. The method of claim 1, wherein the step of applying the patterned mask layer on the first surface comprises the sub-steps of:

applying a mask layer on the first surface by spin coating, slit coating, slit and spin coating, or dry film lamination; and

forming a plurality of grooves in the mask layer to expose a portion of the first surface by electron beam lithography method, photolithography method, or nanoimprint lithography method, thus forming the patterned mask layer.

7. The method of claim 1, wherein the step of etching the exposed portion of the first surface comprises use of a microwave plasma system.

8. The method of claim 7, wherein the microwave plasma system is capable of producing a reactive atmosphere.

9. The method of claim 8, wherein the reactive atmosphere comprises chlorine gas and argon gas.

10. The method of claim 9, wherein a chlorine input flow rate is lower than an argon input flow rate.

11. The method of claim 10, wherein the chlorine input flow rate is in a range from about 4 standard-state cubic centimeters per minute to about 20 standard-state cubic centimeters per minute.

12. The method of claim 10, wherein the argon input flow rate is in a range from about 10 standard-state cubic centimeters per minute to about 60 standard-state cubic centimeters per minute.

13. The method of claim 1, wherein the step of forming the first semiconductor layer comprises the sub-steps of:

applying a first semiconductor pre-layer on the second surface of the substrate;

forming a plurality of second three-dimensional structures on a first semiconductor pre-layer surface at a distance from the substrate.

14. The method of claim 13, wherein the active layer is grown by a horizontal epitaxial growth method.

15. The method of claim 1, wherein the second electrode covers the entire surface of the second semiconductor layer.

16. The method of claim 1, further comprising forming a reflector layer to cover the entire surface of the second semiconductor layer.

17. A method for making a light emitting diode, comprising steps of:

providing a substrate having a first surface and a second surface;

forming a first semiconductor layer, an active layer and a second semiconductor layer on the second surface;

applying a first electrode electrically contacting with the first semiconductor layer;

applying a second electrode to cover a second semiconductor layer surface away from the active layer

applying a patterned mask layer on the first surface, wherein the patterned mask layer comprises a plurality of linear walls aligned side by side, and a groove is defined between each adjacent linear walls to form an exposed portion of the first surface; and

etching the exposed portion along a first direction and a second direction and removing the patterned mask layer to form a plurality of three-dimensional structures, wherein the exposed portion is etched along the first etching direction to form two sidewalls in the substrate covered by the plurality of linear walls, the two sidewalls are etched along the second etching direction, the first direction is substantially perpendicular to the first surface, the second direction is substantially paralleled to the first surface, and the patterned mask layer remains during the step of etching the exposed portion.

18. The method of claim 17, wherein a width of the groove ranges from about 100 nm to about 200 nm.

19. The method of claim 17, wherein a distance between each adjacent grooves ranges from about 300 nm to about 400 nm.

20. The method of claim 17, wherein the exposed portion is etched by a reactive atmosphere comprising chlorine gas and argon gas, and a chlorine input flow rate is lower than an argon input flow rate.