Thin film transistor display panel and manufacturing method of the same

• US 9,184,090 B2
• Filed: 06/01/2011
• Issued: 11/10/2015
• Est. Priority Date: 06/04/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Choi, Seung-Ha, Chung, Kyoung-Jae, Lee, Woo-Geun
• Primary Examiner(s): BOOTH, RICHARD A
• Application Number:
  US13/151,102
• Publication Number:
  US 20110297930A1
• Time in Patent Office: 1,623 Days
• Field of Search: 257347-352, 257/43, 257/E29.296, 438/104
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: H01L 21/76804 by forming tapered via holes
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.

Claims

1. A TFT display panel comprising:

a gate line having a gate pad part, connected to a gate electrode and disposed on an insulation substrate;

a first gate insulting layer disposed on the gate line and the gate electrode and comprising silicon nitride(SiNx);

a second gate insulting layer disposed on the first gate insulting layer and comprising silicon oxide(SiOx);

an oxide semiconductor layer overlapping the gate electrode and having a channel part;

a source electrode and a drain electrode disposed on the oxide semiconductor layer to be separated from each other;

a first passivation layer disposed on the source electrode and the drain electrode and comprising silicon oxide(SiOx); and

a second passivation layer disposed on the first passivation layer and comprising silicon nitride(SiNx),

wherein the second passivation layer, the first passivation layer, the second gate insulating layer, and the first gate insulating layer have a contact hole exposing the gate pad part, and

the contact hole has a shape in which the cross-sectional area increases from the bottom surface at the gate pad part upward.

2. The TFT display panel of claim 1, wherein:

the oxide semiconductor layer comprises an oxide of a material selected from among Zn, In, Ga, Sn Cd, Ge, Pb, Sr, Ca, Ni, Cu, Sb, Ba, Sc, Y, Nb, Ta, Hf, Nd, metal elements of groups 12, 13, and 14 of the periodic table, and combinations thereof.

3. The TFT display panel of claim 1, wherein:

a sidewall of the first contact hole has a structure in which a gradient at the first passivation layer is smaller than a gradient at the second passivation layer.

4. The TFT display panel of claim 2, wherein:

the first gate insulating layer has a thickness of about 250 nm to about 500 nm, and the second gate insulating layer has a thickness of about 30 nm to about 100 nm.

5. The TFT display panel of claim 1, wherein:

the second passivation layer and the first passivation layer have a first contact hole exposing the drain electrode, and

the first contact hole has a shape in which the cross-sectional area increases from the bottom surface at the drain electrode upward.

6. The TFT display panel of claim 5, wherein:

a sidewall of the first contact hole has a first slope, a second slope less steep than the first slope, and a third slope steeper than the second slope from the bottom surface upward.

7. The TFT display panel of claim 6, wherein:

the first gate insulating layer has a thickness of about 250 nm to about 500 nm, and the second gate insulating layer has a thickness of about 30 nm to about 100 nm.

8. The TFT display panel of claim 1, wherein:

the first gate insulating layer has a thickness of about 250 nm to about 500 nm, and the second gate insulating layer may be formed to have a thickness of about 30 nm to about 100 nm.

9. The TFT display panel of claim 1, wherein:

sidewalls of the passivation layer at the first contact hole form an inverted trapezoidal shape.

10. The TFT display panel of claim 5, further comprising:

a pixel electrode layer formed from a transparent conductive material disposed on the second passivation layer;

wherein

the transparent conductive material in the first contact hole has a vertical structure in an inverted trapezoidal shape.