Integrated circuit comprising at least an integrated antenna

• US 9,188,635 B2
• Filed: 07/27/2012
• Issued: 11/17/2015
• Est. Priority Date: 07/28/2011
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Pagani, Alberto, Finocchiaro, Alessandro
• Primary Examiner(s): Montalvo, Eva Y
• Assistant Examiner(s): Lair, Samuel
• Application Number:
  US13/560,632
• Publication Number:
  US 20130027073A1
• Time in Patent Office: 1,208 Days
• Field of Search: 257/E21.022, 257/E29.002, 257/528, 257/531, 257/620, 257/484
• US Class Current: 1/1
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT
• CPC Class Codes: H01L 22/32 Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors arrangements for conducting electric current to or from the solid state body in operation H01L23/48
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/02166 Collar structures
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 28/10 : Inductors
• CPC Class Codes: H01L 29/0642 : Isolation within the component, i.e. internal isolation
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

An integrated circuit on a substrate including at least one peripheral portion that surrounds an active area and is realized close to at least one scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in its peripheral portion on different planes starting from the substrate and realizes an integrated antenna for the circuit.

Claims

1. An integrated circuit comprising:

a substrate including a peripheral portion that surrounds an active area supporting a transceiver circuit, wherein said peripheral portion is realized close to at least one scribe line, and

a conductive structure that extends above said peripheral portion on different planes starting from said substrate and comprising a plurality of first conductive lines realized in said different planes, each first conductive line forming a coil, with the coils made from the first conductive lines connected to form an integrated antenna having a first end and second end coupled to said transceiver circuit; and

another conductive structure that extends above said peripheral portion on different planes comprising a plurality of second conductive lines realized in said different planes to form a seal ring;

wherein the integrated antenna is positioned between the seal ring and the active area on the substrate.

2. Integrated circuit according to claim 1, wherein the coils formed by said first conductive lines are arranged and electrically connected such that a length of said antenna develops in a vertical direction perpendicular to the substrate in the different planes starting from said substrate.

3. Integrated circuit according to claim 1, wherein said seal ring comprises a plurality of pillar structures formed by the connection of second conductive lines belonging to different planes, said pillar structures being distributed in said peripheral portion.

4. Integrated circuit according to claim 3, wherein said first conductive lines that form said antenna are serpentine-like shaped and surround at least partially said pillar structures of said seal ring.

5. Integrated circuit according to claim 3, wherein said first conductive lines that form said antenna are chain-like shaped and completely surround said pillar structures, of said seal ring.

6. Integrated circuit according to claim 3, further comprising reinforced pillar structures realized by portions of said second conductive lines and having greater sizes than corresponding sizes of said pillar structures of said seal ring, said reinforced pillar structures being placed in correspondence with mechanically stressed points of the integrated circuit.

7. Integrated circuit according to claim 1, further comprising a junction suitably biased and realized in said substrate below said antenna.

8. Integrated circuit according to claim 1, further comprising suitably doped areas realized in said substrate so as to extend substantially across said peripheral portion where said antenna is realized.

9. Integrated circuit according to claim 1, further comprising at least one trench realized in said substrate so as to extend substantially across said peripheral portion where said antenna is realized and filled in with an insulating material.

10. Integrated circuit according to claim 3, further comprising an opening for uncovering an upper portion of at least one of said pillar structures, which comprises a conductive line that extends up to said scribe line and/or at least one conductive line that extends up to said active area of said integrated circuit and realizes a pad for said integrated circuit and/or for structures realized in said scribe line.

11. Integrated circuit according to claim 3, wherein said seal ring comprises at least one pillar structure provided with a conductive line realized above it and having greater sizes with respect to the second conductive lines that realize said pillar structure.

12. Integrated circuit according to claim 3, further comprising at least one linear element that passes between said pillar structures of said seal ring and forms said antenna.

13. Integrated circuit according to claim 2, wherein said first conductive lines, forming said coils of said antenna are interrupted in correspondence with a cutting area for realizing at least one pair of terminals of said antenna coupled to said transceiver circuit.

14. Integrated circuit according to claim 1, further comprising a plurality of third conductive lines connected so as to form a further seal ring in said peripheral portion of said integrated circuit and positioned between said antenna and said scribe line.

15. Integrated circuit according to claim 1, wherein said first conductive lines that form said antenna are shaped so as to overhang at least in part said second conductive lines that form said seal ring.

16. Integrated circuit according to claim 1, further comprising a trench structure realized in a central portion of said scribe line.

17. Integrated circuit according to claim 16, wherein said trench structure penetrates in said scribe line up to at least the level of said substrate.

18. Integrated circuit according to claim 16, wherein said trench structure penetrates in said scribe line and at least partially in said substrate.

19. Integrated circuit according to claim 16, wherein said trench structure is covered by a protective layer.

20. Integrated circuit according to claim 1, wherein said antenna acts also as seal ring of said integrated circuit.

21. Integrated circuit according to claim 1, wherein said conductive structure comprises at least one trench structure suitably coated by at least one layer of conductive material to form a coil of said antenna.

22. Integrated circuit according to claim 21, wherein said trench structure is filled in at least partially with a nonconductive filling material.

23. Integrated circuit according to claim 22, wherein said trench structure comprises above said nonconductive filling material at least one further conductive material to form a further coil of said antenna.

24. Integrated circuit according to claim 21, wherein said antenna is formed inside said trench structure by means of a plurality of layers of conductive material arranged at different levels with respect to said substrate and separated by a nonconductive material.

25. Integrated circuit according to claim 21, wherein said antenna also acts as seal ring of said integrated circuit.

26. Integrated circuit according to claim 1, wherein said antenna comprises support structures arranged between its conductive paths.

27. Integrated circuit according to claim 1, wherein said antenna and/or said seal ring comprises at least one material having magnetic features.

28. Integrated circuit according to claim 1, further comprising, adjacent to said antenna at least one trench comprising in turn at least one material having magnetic features for realizing a magnetic trench.

29. Integrated circuit according to claim 28, further comprising at least one pair of magnetic trenches realized on the opposite part with respect to said antenna.

30. Integrated circuit according to claim 29, further comprising a further insulating trench realized in said substrate below said antenna and below said magnetic trenches.

31. Integrated circuit according to claim 30, further comprising insulating and/or magnetic trenches, inside or around said further insulating trench.

32. Testing system of at least one integrated circuit provided with an antenna and realized according to claim 1, said testing system comprising at least one probe card provided with a probe head wherein said probe card comprises at least one test antenna in wireless connection with said antenna of said at least one integrated circuit.

33. Testing system according to claim 32, comprising, in said probe card at least one printed circuit a probe head is connected to and in turn connected to a tester ATE, wherein said probe card comprises at least one substrate of a flexible material provided with at least one first arm, and possibly a second arm, positioned between and connecting said probe head and said printed circuit and in that that said test antenna is realized in said flexible substrate substantially positioned in correspondence with said antenna of said integrated circuit, so as to realize said wireless connection.

34. Testing system according to claim 33, further comprising at least one probe that extends from said probe head crossing said flexible substrate for going into contact with a corresponding pad of said integrated circuit creating a wired communication channel between said probe card and said integrated circuit.

35. Testing system according to claim 34, wherein said at least one probe has magnetic features.

36. Testing system according to claim 34, further comprising an integrated test circuit housed in a suitable seat realized in the probe head and connected to said flexible substrate and comprising circuits for the transmission and reception and possibly coding and decoding of the signals exchanged between said probe card and said integrated circuit.

37. Testing system of at least one integrated circuit provided with an antenna and realized according to claim 1, comprising an antenna card directly associated with a tester of said testing system and comprising in turn a substrate wherein at least one test antenna is realized being in wireless connection with said antenna of said at least one integrated circuit.

38. Testing system according to claim 37, wherein said antenna card also comprises three-dimensional elements projecting from said substrate in the direction of said integrated circuit as three-dimensional Fiducials that may be recognized by positioning video cameras of said testing system.

39. Testing system according to claim 38, wherein said three-dimensional elements are bumps.

40. Testing system according to claim 38, wherein said three-dimensional elements are positioned outside said test antenna.

41. Stacked structure comprising at least one first and one second integrated circuit realized according to claim 1, wherein said first and second integrated circuits are overlapped onto one another so as to position respective antennas in substantial alignment with each other along a development direction of the same so as to create a wireless communication channel in said stacked structure.

42. Package for housing at least one integrated circuit provided with an antenna and realized according to claim 1, said package comprising at least an encapsulating material and a package substrate, as well as external connection elements, and it houses an antenna suitable for realizing a wireless connection with said antenna of said integrated circuit.

43. Package according to claim 42, wherein said antenna is a discrete antenna housed on said package substrate.

44. Package according to claim 42, wherein said antenna is realized in said package substrate.