Detecting and correcting hard errors in a memory array
First Claim
Patent Images
1. A method comprising:
- rewriting data to a portion of a memory array and to a register in response to a first error in data read from the portion of the memory array;
reading the rewritten data from the portion of the memory array and from the register; and
writing the rewritten data from the register to an entry of an error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array.
1 Assignment
0 Petitions
Accused Products
Abstract
Hard errors in the memory array can be detected and corrected in real-time using reusable entries in an error status buffer. Data may be rewritten to a portion of a memory array and a register in response to a first error in data read from the portion of the memory array. The rewritten data may then be written from the register to an entry of an error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array.
41 Citations
20 Claims
-
1. A method comprising:
-
rewriting data to a portion of a memory array and to a register in response to a first error in data read from the portion of the memory array; reading the rewritten data from the portion of the memory array and from the register; and writing the rewritten data from the register to an entry of an error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. An integrated circuit comprising:
-
a memory array; a register; an error status buffer; and repair logic to rewrite data to a portion of the memory array and the register in response to a first error in data read from the portion of the memory array, and wherein the rewritten data is written from the register to an entry of the error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
-
-
18. A non-transitory computer readable medium embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor to:
-
rewrite data to a portion of a memory array and to a register in response to a first error in data read from the portion of the memory array; read the rewritten data from the portion of the memory array and from the register; and write the rewritten data from the register to an entry of an error status buffer in response to the rewritten data read from the register differing from the rewritten data read from the portion of the memory array. - View Dependent Claims (19, 20)
-
Specification