Reducing writes to solid state drive cache memories of storage controllers

• US 9,189,409 B2
• Filed: 02/19/2013
• Issued: 11/17/2015
• Est. Priority Date: 02/19/2013
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Maharana, Parag R.
• Primary Examiner(s): Dudek, Jr., Edward
• Assistant Examiner(s): Birkhimer, Christopher D
• Application Number:
  US13/770,379
• Publication Number:
  US 20140237163A1
• Time in Patent Office: 1,001 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 2212/222 Non-volatile memory

Abstract

Methods and structure are provided for reducing the number of writes to a cache of a storage controller. One exemplary embodiment includes a storage controller that has a non-volatile flash cache memory, a primary memory that is distinct from the cache memory, and a memory manager. The memory manager is able to receive data for storage in the cache memory, to generate a hash key from the received data, and to compare the hash key to hash values for entries in the cache memory. The memory manager can write the received data to the cache memory if the hash key does not match one of the hash values. Also, the memory manager can modify the primary memory instead of writing to the cache if the hash key matches a hash value, in order to reduce the amount of data written to the cache memory.

Claims

1. A system comprising

a storage controller that processes Input/Output (I/O) from a host to communicate with storage devices via a switched fabric, comprising:

a non-volatile flash cache memory operable to store I/O from the host for writing to the storage devices;

a primary memory that is distinct from the cache memory; and

a memory manager operation to receive data from the host or writing to at least one of the storage devices, to generate a hash key from the received data, and to compare the hash key to hash values that each correspond with a different entry in the cache memory,

the memory manager further operable to write the received data to the cache memory if the hash key does not match any of the hash values,

the memory manager further operable, if the hash key matched one of the hash values, to add a pointer in the primary memory that points to an entry in the cache memory corresponding with the hash value, instead of writing the received data to the cache.

2. The system of claim 1, wherein:

each of the entries corresponds with a Logical Block Address (LBA) of a logical volume implemented by the storage devices.

3. The system of claim 1, wherein:

the memory manager is further operable to determine a number of pointers in the primary memory that refer to an existing cache entry, and to prevent the modification of the existing cache entry if there are multiple pointers in the primary memory that refer to the existing cache entry.

4. The system of claim 1, wherein:

the cache memory includes an entry that stores data for an address of a logical volume, and

the memory manager is further operable to receive new data that will overwrite the address, to determine that a pointer in the primary memory refers to the cache entry that stores the data that will be overwritten, to generate a new cache entry corresponding to the new data, and to modify the primary memory to include a pointer to the new entry in cache memory.

5. The system of claim 1, wherein:

the storage controller is operable to translate a single I/O from the host into multiple Redundant Array of Independent Disks (RAID) requests that are directed to different storage devices.

6. The system of claim 1, wherein:

the hash key and hash values are generated by a hashing algorithm that does not map each unique input to a different value, and

the memory manager is further operable, responsive to determining that the hash key matches the hash value, to confirm that the received data matches data from the entry that corresponds with the hash value.

7. The system of claim 1, wherein:

the storage controller is operable to maintain mapping data comprising multiple records that are each associated with a Logical Block Address (LBA), wherein the storage controller tags each of the records as either a source record or an alias record, each source record pointing directly to an entry in the cache memory, and each alias record pointing to a source record, and

the storage controller is operable to follow a record associated with the received data to identify an entry in the cache memory.

8. A method for operating a storage controller that processes Input/Output (I/O) from a host to communicate with storage devices via a switched fabric, comprising:

receiving, at the storage controller, data for writing to at least one of the storage devices;

generating a hash key at the storage controller from the received data;

comparing, at the storage controller, the hash key to hash values that each correspond with a different entry in a non-volatile flash cache memory of the storage controller;

if the hash key does not match any of the hash values, writing the received data to the cache memory; and

if the hash key matches one of the hash values, adding a pointer in a primary memory of the storage controller that is distinct from the cache memory, wherein the pointer points to an entry in the cache memory corresponding with the hash value.

9. The method of claim 8, wherein:

each of the entries corresponds with a Logical Block Address (LBA) of a logical volume implemented by the storage devices.

10. The method of claim 8, further comprising:

determining a number of pointers in the primary memory that refer to an existing cache entry; and

preventing the modification of the existing cache entry if there are multiple pointers in the primary memory that refer to the existing cache entry.

11. The method of claim 8, wherein:

the cache memory includes an entry that stores data for an address of a logical volume, and the method further comprises;

receiving new data that will overwrite the address;

determining that a pointer in the primary memory refers to the cache entry that stores the data that will be overwritten;

generating a new cache entry corresponding to the new data; and

modifying the primary memory to include a pointer to the new entry in cache memory.

12. The method of claim 8, further comprising:

translating, at the storage controller, a single I/O from the host into multiple Redundant Array of Independent Disks (RAID) requests that are directed to different storage devices.

13. The method of claim 8, wherein:

the hash key and hash values are generated by a hashing algorithm that does not map each unique input to a different value, and the method further comprises;

confirming, responsive to determining that the hash key matches the hash value, that the received data matches data from the entry that corresponds with the hash value.

14. The method of claim 8, further comprising:

maintaining mapping data comprising multiple records that are each associated with a Logical Block Address (LBA);

tagging each of the records as either a source record or an alias record, each source record pointing directly to an entry in the cache memory, and each alias record pointing to a source record; and

following a record associated with the received data to identify an entry in the cache memory.

15. A non-transitory computer readable medium embodying programmed instructions which, when executed by a processor, are operable for performing a method of operating a storage controller that processes Input/Output (I/O) from a host to communicate with storage devices via a switched fabric, the method comprising:

receiving, at the storage controller, data for writing to at least one of the storage devices;

generating a hash key at the storage controller from the received data;

comparing, at the storage controller, the hash key to hash values that each correspond with a different entry in a non-volatile flash cache memory of the storage controller;

if the hash key does not match any of the hash values, writing the received data to the cache memory; and

if the hash key matches one of the hash values, adding a pointer in a primary memory of the storage controller that is distinct from the cache memory, wherein the pointer points to an entry in the cache memory corresponding with the hash value.

16. The medium of claim 15, wherein:

each of the entries corresponds with a Logical Block Address (LBA) of a logical volume implemented by the storage devices.

17. The medium of claim 15, the method further comprising:

determining a number of pointers in the primary memory that refer to an existing cache entry; and

preventing the modification of the existing cache entry if there are multiple pointers in the primary memory that refer to the existing cache entry.

18. The medium of claim 15, wherein:

the cache memory includes an entry that stores data for an address of a logical volume, and the method further comprises;

receiving new data that will overwrite the address;

determining that a pointer in the primary memory refers to the cache entry that stores the data that will be overwritten;

generating a new cache entry corresponding to the new data; and

modifying the primary memory to include a pointer to the new entry in cache memory.

19. The method of claim 15, the method further comprising:

translating, at the storage controller, a single I/O from the host into multiple Redundant Array of Independent Disks (RAID) requests that are directed to different storage devices.

20. The medium of claim 15, wherein:

the hash key and hash values are generated by a hashing algorithm that does not map each unique input to a different value, and the method further comprises;

confirming, responsive to determining that the hash key matches the hash value, that the received data matches data from the entry that corresponds with the hash value.