Systems and methods of applying bleed circuits in LED lamps

• US 9,192,011 B2
• Filed: 10/22/2014
• Issued: 11/17/2015
• Est. Priority Date: 12/16/2011
• Status: Active Grant

• Current Assignee: LEDVANCE LLC (MLS Co. Ltd.)
• Original Assignee: TerraLUX Incorporated
• Inventors: Brandt, Brian
• Primary Examiner(s): TRAN, ANH Q
• Application Number:
  US14/520,671
• Publication Number:
  US 20150145441A1
• Time in Patent Office: 391 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/3575 by means of dummy loads or bleeder circuits, e.g. for dimmers
• CPC Class Codes: Y02B 20/40 Control techniques providing energy savings, e.g. smart controller or presence detection

Abstract

A bleed circuit is applied to a transformer based on a bleed-on time and a bleed-off time determined by monitoring an output voltage waveform of the transformer.

Claims

1. A method of operating an LED system including an electronic transformer, the method comprising:

monitoring an output voltage waveform of the transformer;

computing a bleed-on cycle time by initiating a bleed-on timer when the output voltage waveform falls below a predetermined minimum threshold and turning off the bleed-on timer when the output voltage waveform exceeds a predetermined maximum threshold;

computing a bleed-off cycle time by initiating a bleed-off timer when the output voltage waveform exceeds the predetermined maximum threshold and turning off the bleed-off timer when the output voltage waveform falls below the predetermined minimum threshold;

storing the bleed-on cycle time and the bleed-off cycle time in a computer memory;

during a later use of the LED system, when the LED system is turned on, retrieving the bleed-on cycle time and the bleed-off cycle time from the computer memory; and

engaging a bleed circuit to the transformer in accordance with the bleed-on cycle time and disengaging the bleed circuit from the transformer in accordance with the bleed-off cycle time, the bleed circuit being engaged for a duration adequate to ensure a minimum load on the transformer sufficient to avoid cut-off throughout the output voltage waveform.

2. The method of claim 1, further comprising updating the bleed-on cycle time and the bleed-off cycle time in accordance with changes in the output voltage waveform.

3. The method of claim 2, wherein the updating occurs every cycle or every few cycles of the output voltage waveform.

4. The method of claim 1, further comprising updating the bleed-on cycle time in accordance with changes in the output voltage waveform more frequently than updating the bleed-off cycle time in accordance with changes in the output voltage waveform.

5. The method of claim 1, wherein the bleed-on cycle time is substantially equivalent to a period of the output voltage waveform.

6. The method of claim 1, further comprising eliminating a delay in computing the bleed-on cycle time or in computing the bleed-off cycle time by using the time stored from a previous cycle in a current cycle.

7. The method of claim 1, further comprising computing the bleed-off cycle time only one time.

8. The method of claim 7, wherein the bleed-off cycle time is computed when the LED system is first powered on.

9. A system for minimizing flicker in a circuit comprising an LED lamp and an electronic transformer, the system comprising:

a bleed circuit;

an analyzer for monitoring an output voltage waveform of the transformer and determining a bleed-on cycle time and a bleed-off cycle time based at least in part on the monitored output voltage waveform;

a memory for storing the bleed-on cycle time and the bleed-off cycle time; and

control circuitry for (i) retrieving the bleed-on cycle time and the bleed-off cycle time from the computer memory when the LED lamp is turned on and (ii) selectively engaging the bleed circuit to the transformer in accordance with the retrieved cycle times, the bleed circuit ensuring a minimum load on the transformer sufficient to avoid cut-off.

10. The system of claim 9, wherein the bleed circuit comprises at least one of a resistor or a transistor.

11. The system of claim 9, wherein the analyzer is configured to start a bleed-on timing cycle when a trailing edge of the output voltage waveform falls below a predetermined threshold and to end the bleed-on timing cycle when a subsequent trailing edge of the output voltage waveform falls below a predetermined minimum threshold.

12. The system of claim 11, wherein the analyzer is configured to start a bleed-off timing cycle when a leading edge of the output voltage waveform begins to rise and to end the bleed-off timing cycle when the leading edge of the output voltage waveform exceeds a predetermined maximum threshold.

13. The system of claim 12, wherein the control circuit is configured to engage the bleed circuit at a start of a bleed-on timing cycle and to disengage the bleed circuit at an end of a bleed-off timing cycle.