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Semiconductor arrangement, semiconductor module, and method for connecting a semiconductor chip to a ceramic substrate

  • US 9,196,562 B2
  • Filed: 09/07/2011
  • Issued: 11/24/2015
  • Est. Priority Date: 10/20/2006
  • Status: Active Grant
First Claim
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1. A semiconductor arrangement comprising:

  • a silicon body having a top surface and a bottom surface;

    a thin electrically conductive adhesion layer deposited on the top surface of said silicon body;

    a thick metal layer arranged on the thin electrically conductive adhesion layer, said thick metal layer having a bonding surface facing away from the top surface of said silicon body;

    a bonding wire having a diameter of at least 300 micrometers (μ

    m) or a bonding ribbon having a thickness of at least 200 micrometers (μ

    m) bonded to said thick metal layer at the bonding surface of said thick metal layer; and

    wherein the thickness of said thick metal layer is at least 10 micrometers (μ

    m), said thick metal layer comprises copper or a copper alloy, and said bonding wire or bonding ribbon comprises copper or a copper-based material.

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