3D stacked IC device with stepped substack interlayer connectors
First Claim
1. A structure on a multilayer device, comprising:
- a substrate;
N step(s) on the substrate from a surface of the substrate at a first level to a surface of the substrate at a second level, where N is an integer one or greater;
a stack of active layers alternating with insulating layers on the substrate, including a plurality of substacks disposed in relation to the N step(s) to form respective contact regions in which the substacks are disposed at a common level, each substack having an upper layer;
a nonconductive, silicon nitride etch stop layer covering the upper layer of each of the plurality of substacks; and
conductors in the respective regions connected to landing areas on active layers in each of the plurality of substacks, the conductors passing through and physically contacting the nonconductive, silicon nitride etch stop layer.
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Accused Products
Abstract
A stepped substack interlayer connector structure on a multilayer integrated circuit includes N steps on the substrate from a surface of the substrate at a first level to a surface of the substrate at a second level. A stack of active layers alternating with insulating layers on the substrate, including a plurality of substacks disposed in relation to the N step(s) to form respective contact regions in which the substacks are disposed at a common level. Interlayer connectors are formed by conductors in the respective regions connected to landing areas on active layers in each of the plurality of substacks. The maximum depth of the interlayer connectors is equal to, or less than, the thickness of one of the substacks.
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Citations
24 Claims
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1. A structure on a multilayer device, comprising:
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a substrate; N step(s) on the substrate from a surface of the substrate at a first level to a surface of the substrate at a second level, where N is an integer one or greater; a stack of active layers alternating with insulating layers on the substrate, including a plurality of substacks disposed in relation to the N step(s) to form respective contact regions in which the substacks are disposed at a common level, each substack having an upper layer; a nonconductive, silicon nitride etch stop layer covering the upper layer of each of the plurality of substacks; and conductors in the respective regions connected to landing areas on active layers in each of the plurality of substacks, the conductors passing through and physically contacting the nonconductive, silicon nitride etch stop layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 22)
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13. An integrated circuit, comprising:
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a substrate having a memory area and a peripheral area, the memory area including a pit in the substrate having a stepped side; a stack of active layers in the memory area alternating with insulating layers on the substrate, active layers in the stack including landing pad areas; the stack including a plurality of substacks having respective uppermost layers, and with landing pad areas disposed in relation to the stepped side so that uppermost layers of the plurality of substacks are disposed at a common level in respective contact regions, each substack having an upper layer; a nonconductive, silicon nitride etch stop layer covering the upper layer of each of the plurality of sub stacks; and conductors in the respective contact regions extending to landing areas on the landing pads of the active layers in each of the plurality of substacks, the conductors passing through and physically contacting the nonconductive, silicon nitride etch stop layer. - View Dependent Claims (14, 15, 23)
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16. A method for manufacturing a structure for a multilayer device, comprising:
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forming N step(s), where N is an integer equal to one or greater, including step (i), for i=0 to N−
1, from a surface of a substrate at a first level to a surface of the substrate at a second level, each step having a rise and a run, wherein the run of a last step (i=N−
1) in the N steps is at the second level;forming a stack of active layers alternating with insulating layers on the substrate, the stack including N+1 substacks, including substacks (j), for j equal to 0 to N, and having respective uppermost layers, a first substack (j), j equal to 0, overlying the rises and runs of the N steps including the last step (i), i equal to N−
1, intermediate substacks (j) for j equal to 1 to N−
1 overlying the preceding substacks and overlying the rises of the steps (i), for i equal to N−
1−
j, and a uppermost substack overlying the preceding substacks and no step in the N steps;
to form respective regions over the substacks in which uppermost layers of the substacks are disposed at a common level, each substack having an upper layer;forming a nonconductive, silicon nitride etch stop layer covering the upper layer of each sub stack; and forming vias in the respective regions passing through the etch stop layer and to landing areas on active layers in each of the plurality of substacks; and forming conductors in the vias, the conductors passing through and physically contacting the nonconductive, silicon nitride etch stop layer. - View Dependent Claims (17, 18, 19, 20, 21, 24)
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Specification