Systems, and methods of RF power transmission, modulation, and amplification, including embodiments for output stage protection

• US 9,197,163 B2
• Filed: 08/13/2013
• Issued: 11/24/2015
• Est. Priority Date: 10/22/2004
• Status: Active Grant

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Sorrells, David F., Rawlins, Gregory S., Rawlins, Michael W.
• Primary Examiner(s): Nguyen, Khanh V
• Application Number:
  US13/965,270
• Publication Number:
  US 20130328624A1
• Time in Patent Office: 833 Days
• Field of Search: 330/2, 330/10, 330/124.R, 330/295
• US Class Current: 1/1
• CPC Class Codes: H03C 5/00 Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal H03C7/00 takes precedence
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/3205 in field-effect transistor amplifiers
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2201/3215 To increase the output power or efficiency
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/0483 : Transmitters with multiple parallel paths
• CPC Class Codes: H04B 2001/045 : with means for improving efficiency
• CPC Class Codes: H04B 2001/0491 : with frequency synthesizers, frequency converters or modulators
• CPC Class Codes: H04L 27/20 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/36 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/362 : Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence

Abstract

Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Claims

1. An apparatus comprising:

a first module configured to generate a plurality of control signals from information;

a second module configured to generate a plurality of substantially constant envelope signals based on the control signals and a frequency reference signal;

a combining device configured to combine the substantially constant envelope signals to generate an output signal, wherein the combining device comprises a plurality of branches, each of the plurality of branches comprising a pre-driver stage, a driver stage and a combining stage, and wherein;

a driver stage bias circuit is coupled to the driver stage;

an output stage bias circuit is coupled to the combining stage; and

an output stage protection circuit is coupled to the combining stage.

2. The apparatus of claim 1, wherein the output stage protection circuit comprises:

means for controlling a gain of the combining device to ensure that the output signal remains below a threshold.

3. The apparatus of claim 2, wherein the means for controlling the gain comprises:

means for monitoring the output signal; and

means for decreasing the gain of the combining device when the output signal is above the threshold.

4. The apparatus of claim 3, wherein the means for decreasing the gain comprises:

means for reducing a gain of one or more of the plurality of branches when the output signal is above the threshold.

5. The apparatus of claim 1, wherein each of the driver stage bias circuit and the output stage bias circuit comprises a digital-to-analog converter (DAC).

6. The apparatus of claim 5, wherein the DAC is configured to convert a digital bias signal to an analog bias signal, wherein the digital bias signal is based on the plurality of control signals.

7. The apparatus of claim 6, wherein each of the driver stage bias circuit and the output stage bias circuit further comprises an interpolation filter configured to shape the analog bias signal.

8. The apparatus of claim 1, wherein the output stage protection circuit comprises a feedback circuit between an output of the combining device and an input to the combining device.

9. The apparatus of claim 8, wherein the feedback circuit is configured to monitor the output signal.

10. The apparatus of claim 8, wherein the feedback circuit is configured to limit a voltage of the output signal to fall below a breakdown voltage associated with one or more transistors of the combining device.

11. The apparatus of claim 1, wherein the combining device comprises a harmonic control circuit coupled to an input of the combining stage, wherein the harmonic control circuit is configured to control an output frequency spectrum of the output signal.

12. The apparatus of claim 11, wherein the harmonic control circuit is configured to shape an input signal to the combining stage to maximize real power transfer to a fundamental harmonic of the output signal.

13. A method comprising:

generating a plurality of control signals from information;

generating a plurality of substantially constant envelope signals based on the control signals and a frequency reference signal;

combining, with a combining device, the substantially constant envelope signals to generate an output signal, wherein the combining device comprises a plurality of branches, each of the plurality of branches comprising a pre-driver stage, a driver stage and a combining stage, and wherein;

a driver stage bias circuit is coupled to the driver stage;

an output stage bias circuit is coupled to the combining stage; and

an output stage protection circuit is coupled to the combining stage.

14. The method of claim 13, wherein the combining comprises controlling a gain of the combining device to ensure that the output signal remains below a threshold.

15. The method of claim 14, wherein the controlling the gain comprises:

monitoring the output signal; and

decreasing the gain of the combining device when a signal level of the output signal is above the threshold.

16. The method of claim 15, wherein the decreasing the gain comprises reducing a gain of one or more of the plurality of branches when the output signal is above the threshold.

17. The method of claim 13, wherein the combining comprises converting one or more digital bias signals to one or more respective analog bias signals, wherein the one or more digital bias signals are based on the plurality of control signals.

18. The method of claim 17, wherein the combining further comprises shaping the one or more respective analog bias signals.

19. The method of claim 13, wherein the combining comprises monitoring the output signal.

20. The method of claim 13, wherein the combining comprises limiting a voltage of the output signal to fall below a breakdown voltage associated with one or more transistors of the combining device.

21. The method of claim 13, wherein the combining comprises controlling an output frequency spectrum of the output signal.

22. The method of claim 21, wherein the controlling comprises shaping an input signal to the combining stage to maximize real power transfer to a fundamental harmonic of the output signal.