Semiconductor package with air pressure sensor

• US 9,200,973 B2
• Filed: 06/28/2012
• Issued: 12/01/2015
• Est. Priority Date: 06/28/2012
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Lin, Kevin L., Ma, Qing, Eid, Feras, Swan, Johanna, Teh, Weng Hong
• Primary Examiner(s): ALLEN, ANDRE J
• Application Number:
  US13/536,210
• Publication Number:
  US 20140000377A1
• Time in Patent Office: 1,251 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 2203/0127 Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function
• CPC Class Codes: B81B 2203/0315 Cavities
• CPC Class Codes: B81B 2203/04 Electrodes
• CPC Class Codes: B81B 7/0058 for protecting against damages due to external chemical or mechanical influences, e.g. shocks or vibrations
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively
• CPC Class Codes: G01L 9/0047 Diaphragm with non uniform thickness, e.g. with grooves, bosses or continuously varying thickness
• CPC Class Codes: G01L 9/007 using variations in inductance
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/18162 of a chip with build-up interconnect

Abstract

A semiconductor package having an air pressure sensor and methods to form a semiconductor package having an air pressure sensor are described. For example, a semiconductor package includes a plurality of build-up layers. A cavity is disposed in one or more of the build-up layers. An air pressure sensor is disposed in the plurality of build-up layers and includes the cavity and an electrode disposed above the cavity. Also described are various approaches to fabricating a semiconductor package having a hermetically sealed region.

Claims

1. A semiconductor package, comprising:

a substrate comprising a plurality of build-up layers;

a semiconductor die housed in the substrate;

a cavity disposed in one or more of the build-up layers, above the semiconductor die;

an air pressure sensor disposed in the plurality of build-up layers and comprising the cavity and an electrode disposed above the cavity, the electrode electrically coupled to the semiconductor die; and

one or more openings exposing a portion of the air pressure sensor to air pressure ambient to the semiconductor package.

2. The semiconductor package of claim 1, wherein the substrate is a bumpless build-up layer (BBUL) substrate.

3. The semiconductor package of claim 2, wherein the BBUL substrate is a coreless substrate.

4. The semiconductor package of claim 1, wherein the cavity is a hermetically sealed cavity.

5. The semiconductor package of claim 4, wherein the hermetically sealed cavity comprises a continuous via ring.

6. The semiconductor package of claim 5, wherein one or more of the build-up layers having the hermetically sealed cavity disposed therein is an Anjinomoto build-up film (ABF) layer, and wherein the continuous via ring comprises copper.

7. The semiconductor package of claim 1, wherein the air pressure sensor comprises a MEMS device.

8. The semiconductor package of claim 7, wherein a diaphragm of the MEMS device comprises the cavity, and wherein the electrode comprises a suspended portion of the MEMS device.

9. The semiconductor package of claim 8, wherein the suspended portion of the MEMS device comprises copper.

10. The semiconductor package of claim 7, wherein the MEMS device is disposed proximate to an active surface of the semiconductor die and distal from a back surface of the semiconductor die.

11. The semiconductor package of claim 1, further comprising:

a layer having a mesh pattern disposed in the cavity, the layer providing structural support for the cavity.

12. The semiconductor package of claim 1, further comprising:

a thin metal plate disposed between the cavity and the electrode, the thin metal plate providing structural support for the cavity.

13. The semiconductor package of claim 1, wherein the cavity provides a reference pressure for the air pressure sensor.

14. The semiconductor package of claim 1, further comprising:

a permanent magnet coupled with the air pressure sensor.