Quality of service support using stacked memory device with logic die
First Claim
1. An integrated circuit (IC) device comprising:
- a set of one or more stacked memory dies implementing memory cell circuitry; and
a set of one or more logic dies electrically coupled to the memory cell circuitry, the set of one or more logic dies comprising a quality-of-service (QoS) manager and a memory controller, the memory controller coupled to the QoS manager and coupleable to a set of one or more devices sharing access to the set of one or more stacked memory dies, and the QoS manager to perform operations for a specified QoS objective.
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Abstract
A die-stacked memory device implements an integrated QoS manager to provide centralized QoS functionality in furtherance of one or more specified QoS objectives for the sharing of the memory resources by other components of the processing system. The die-stacked memory device includes a set of one or more stacked memory dies and one or more logic dies. The logic dies implement hardware logic for a memory controller and the QoS manager. The memory controller is coupleable to one or more devices external to the set of one or more stacked memory dies and operates to service memory access requests from the one or more external devices. The QoS manager comprises logic to perform operations in furtherance of one or more QoS objectives, which may be specified by a user, by an operating system, hypervisor, job management software, or other application being executed, or specified via hardcoded logic or firmware.
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Citations
24 Claims
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1. An integrated circuit (IC) device comprising:
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a set of one or more stacked memory dies implementing memory cell circuitry; and a set of one or more logic dies electrically coupled to the memory cell circuitry, the set of one or more logic dies comprising a quality-of-service (QoS) manager and a memory controller, the memory controller coupled to the QoS manager and coupleable to a set of one or more devices sharing access to the set of one or more stacked memory dies, and the QoS manager to perform operations for a specified QoS objective. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method comprising:
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operating an integrated circuit (IC) device to perform memory access requests for one or more devices of a set of devices external to the IC device, the IC device comprising a set of one or more stacked memory dies comprising memory cell circuitry and comprising a set of one or more logic dies electrically coupled to the set of one or more stacked memory dies, the set of one or more logic dies comprising a quality of service (QoS) manager coupled to the memory cell circuitry of the set of one or more stacked memory dies and comprising a memory controller coupled to the QoS manager and coupled to the one or more devices; and operating the QoS manager to perform operations for a specified QoS objective. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A non-transitory computer readable medium storing code which is operable to manipulate at least one computer system to perform a portion of a process to fabricate an integrated circuit (IC) device, the IC device comprising:
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a set of one or more stacked memory dies implementing memory cell circuitry; and a set of one or more logic dies electrically coupled to the memory cell circuitry, the set of one or more logic dies comprising a quality-of-service (QoS) manager and a memory controller, the memory controller coupled to the QoS manager and coupleable to a set of one or more devices sharing access to the set of one or more stacked memory dies, and the QoS manager to perform operations for a specified QoS objective. - View Dependent Claims (23, 24)
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Specification