Semiconductor device

• US 9,202,936 B2
• Filed: 07/21/2014
• Issued: 12/01/2015
• Est. Priority Date: 03/09/2011
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Nishii, Akito, Nakamura, Katsumi
• Primary Examiner(s): Gebreyesus, Yosef
• Application Number:
  US14/336,800
• Publication Number:
  US 20140327072A1
• Time in Patent Office: 498 Days
• Field of Search: 257/144, 257/152, 257/288, 257/330, 257/452, 257/481, 257/E28.01, 257/E29.036, 257/E29.037, 257/E29.115, 257/E31.084, 257/121, 257/367, 257/480, 257/594
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/083 Anode or cathode regions of thyristors or gated bipolar-mode devices
• CPC Class Codes: H01L 29/423 not carrying the current to be rectified, amplified or switched
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 29/861 Diodes

Abstract

A semiconductor device includes: an N-type drift layer; a P-type anode layer on the N-type drift layer; a trench penetrating the P-type anode layer; a conductive substance embedded in the trench via an insulating film; and an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer.

Claims

1. A semiconductor device comprising:

an N-type drift layer;

a P-type anode layer on the N-type drift layer;

a trench penetrating the P-type anode layer;

a plurality of P⁺-type contact layers on the P-type anode layer and having impurity concentration which is higher than that of the P-type anode layer;

a conductive substance embedded in the trench via an insulating film; and

an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer,

wherein the plurality of P⁺-type contact layers are spaced apart from each other and arranged in a longitudinal direction of the trench as viewed in plan.

2. The semiconductor device according to claim 1, wherein the N-type buffer layer has an impurity concentration which is equal to or below 1×

10¹⁷ cm<sup>−

3</sup>.

3. The semiconductor device according to claim 1, wherein the trench has a width which is equal to or below 1.2 μ

m.