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Phase locked loop circuit

  • US 9,203,418 B2
  • Filed: 04/03/2014
  • Issued: 12/01/2015
  • Est. Priority Date: 05/14/2012
  • Status: Expired due to Fees
First Claim
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1. A phase locked loop circuit, comprising an inner loop and an outer loop, wherein:

  • the inner loop comprises a frequency synthesizer locked on a master clock signal received from a master clock generator unit;

    the outer loop comprises a binary phase detector, an output of which goes to a loop filter with proportional and integral action, controlling the inner loop frequency value via a sigma delta input.

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