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FPGA configuration bitstream protection using multiple keys

  • US 9,208,357 B1
  • Filed: 08/28/2014
  • Issued: 12/08/2015
  • Est. Priority Date: 01/25/2005
  • Status: Active Grant
First Claim
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1. A method of processing a configuration bitstream at a computing device comprising:

  • obtaining, at the computing device, a plurality of encryption keys and the configuration bitstream;

    encoding the configuration bitstream using an encoded key produced from the plurality of encryption keys to generate an encrypted bit stream;

    providing the encrypted bit stream to a first memory external to the computing device; and

    providing the plurality of encryption keys to a second memory external to the computing device.

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