Chip unit with protrusions for interlocking mechanism and method for manufacturing the same

• US 9,214,602 B2
• Filed: 06/11/2013
• Issued: 12/15/2015
• Est. Priority Date: 12/21/2012
• Status: Expired due to Fees

• Current Assignee: Hon Hai Precision Industry Co., Ltd.
• Original Assignee: Hon Hai Precision Industry Co., Ltd.
• Inventors: Lai, Chih-Chen
• Primary Examiner(s): Kraig, William F
• Assistant Examiner(s): Malek, Maliheh
• Application Number:
  US13/914,643
• Publication Number:
  US 20140175496A1
• Time in Patent Office: 917 Days
• Field of Search: 257/594, 257/E33.057, 257/E33.058
• US Class Current: 1/1
• CPC Class Codes: G02B 6/4261 Packages with mounting structures to be pluggable or detachable, e.g. having latches or rails
• CPC Class Codes: H01L 2224/83385 Shape, e.g. interlocking features
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate

Abstract

A chip unit includes a base and two chips. Each chip includes a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer and an electrode. The substrate forms a groove in a bottom face thereof and two blocks besides the groove. The base forms a protrusion on a top face thereof and two slots besides the protrusion. The protrusion is fittingly received in the groove, and the two blocks are fittingly received in the two slots, respectively. A method for manufacturing the chip unit is also disclosed.

Claims

1. A method for manufacturing a chip unit, comprising:

making a base and a chip, the chip comprising a substrate, a first semiconductor layer, a light emitting layer and a second semiconductor layer, the base having a protrusion, and the substrate having a groove;

disposing the chip on the base by fitting the protrusion into the groove;

wherein the chip is made by making an original chip comprising a temporary layer, the first semiconductor layer, the light emitting layer and the second semiconductor layer and a connecting layer;

wherein the chip is made by further forming a photoresist layer on the connecting layer, a part of the connecting layer being covered by the photoresist layer and another part of the connecting layer being exposed; and

wherein the chip is made by further forming a supporting layer on the exposed another part of the connecting layer, the supporting layer and the connecting layer cooperatively forming the substrate as a monolithic piece and being made of a same metallic material.

2. The method of claim 1, wherein the connecting layer is electroplated on the first semiconductor layer.

3. The method of claim 1, wherein the supporting layer has a face flush with that a face of the photoresist layer.

4. The method of claim 1, wherein the chip is made by further removing the photoresist layer and the temporary layer from the original chip.

5. The method of claim 4, wherein the chip is made by further forming an electrode on the second semiconductor layer after the photoresist layer and the temporary substrate are removed.

6. The method of claim 5, wherein the original chip is reversed after forming the supporting layer and before forming the electrode.

7. The method of claim 1, wherein the first semiconductor layer is a P-type semiconductor layer, and the second semiconductor layer is an N-type semiconductor layer.

8. The method of claim 1, wherein the substrate is made of nickel.