Method and system for monitoring data channel to enable use of dynamically adjustable LDPC coding parameters in a data storage system

• US 9,214,963 B1
• Filed: 12/21/2012
• Issued: 12/15/2015
• Est. Priority Date: 12/21/2012
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Garani, Shayan S., Anderson, Kent D., Krishnan, Anantha Raman, Lu, Guangming, Dahandeh, Shafa, Tomlin, Andrew J.
• Primary Examiner(s): Merant, Guerrier
• Application Number:
  US13/725,965
• Time in Patent Office: 1,089 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1048 using arrangements adapted for a specific error detection or correction feature
• CPC Class Codes: H03M 13/1102 Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
• CPC Class Codes: H03M 13/353 Adaptation to the channel
• CPC Class Codes: H03M 13/618 Shortening and extension of codes
• CPC Class Codes: H03M 13/6516 Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields

Abstract

A data storage system configured to adaptively code data and related methods are disclosed. In some embodiments of the present invention, a data storage system includes a controller and a non-volatile memory array having a plurality of memory pages. The controller includes a channel monitor that determines the quality of read signals from the pages when they are read, and provides adjustment metrics to aid in the selection of a code rate, such as a code rate for a low-density parity-check (LDPC) code. In this way, the code rate used for data encoding can be dynamically adjusted to accommodate degradation of the non-volatile memory array over its useable life.

Claims

1. A data storage system, comprising:

a non-volatile memory array comprising a plurality of memory pages; and

a controller coupled to the non-volatile memory array through a data channel, the controller being configured to;

use a first set of low-density parity-check (LDPC) coding parameters to encode at a first code rate first data to be stored into the non-volatile memory array through the data channel, wherein the first set of LDPC coding parameters define a characteristic of a first matrix used to encode the first data;

detect a change in a condition of the data channel; and

in response to said detecting, use a second set of LDPC coding parameters to encode at a second code rate different from the first code rate second data to be stored into the non-volatile memory array through the data channel,

wherein the second set of LDPC coding parameters define a characteristic of a second matrix used to encode the second data and are different from the first set of LDPC coding parameters.

2. The data storage system of claim 1, wherein the controller is further configured to select the first or second set of LDPC coding parameters from a pre-defined collection of sets of coding parameters having the same LDPC code word length.

3. The data storage system of claim 2, wherein each set of coding parameters of the pre-defined collection enables coding by the controller at a different code rate.

4. The data storage system of claim 2, wherein the controller is further configured to select the pre-defined collection of sets of coding parameters from a plurality of pre-defined collections of sets, and at least some of the plurality of pre-defined collections of sets have different pre-defined LDPC code word lengths, the controller being further configured to support coding for multiple non-volatile memory page formats using the plurality of pre-defined collections of sets.

5. The data storage system of claim 4, wherein at least one of the multiple non-volatile memory page formats does not have a page length that is equal to any of the pre-defined LDPC code word lengths associated with the plurality of pre-defined collections of sets.

6. The data storage system of claim 5, wherein the controller is further configured to use the first set of LDPC coding parameters to encode the first data by at least:

adding an amount of padding data to the first data;

determining parity data for the first data and the padding data using the first set of LDPC coding parameters; and

storing the first data and the parity data into the non-volatile memory array.

7. The data storage system of claim 6, wherein the amount of the padding data depends at least in part on a difference between the pre-defined LDPC code word length of the first set of LDPC coding parameters and a common memory page size for the non-volatile memory array.

8. The data storage system of claim 1, wherein the change in the condition of the data channel is detected through using at least a signal to noise (SNR) ratio.

9. The data storage system of claim 1, wherein the change in the condition of the data channel is detected through using one or more error statistics including:

a bit error rate encountered during a read operation of a memory page in the non-volatile memory array, an average bit error rate encountered during read operations of a group of memory pages, a program/erase (PE) cycle count, and a number of LPDC iterations used to converge.

10. The data storage system of claim 9, wherein the first and second data are stored in the same block of the non-volatile memory array, and the one or more error statistics is from at least one memory page from the same block.

11. The data storage system of claim 9, wherein the first and second data are stored in the same block of the non-volatile memory array, and the one or more error statistics is from one or more read operations on a block that is different from the block in which the first and second data are stored.

12. The data storage system of claim 11, wherein the one or more error statistics is from one or more memory pages of a reference block.

13. The data storage system of claim 11, wherein the one or more error statistics is from one or more memory pages that have been successfully decoded.

14. The data storage system of claim 1, wherein the first or second set of LDPC coding parameters comprises a P matrix size, a column weight, and a row weight, and further comprises at least one of a code rate, an amount of user data, and an amount of parity data.

15. The data storage system of claim 1, wherein the plurality of memory pages comprises error-correcting code pages (E-pages).

16. The data storage system of claim 1, wherein the controller is further configured to store an indication of a code rate for data written to one or more blocks of memory of the non-volatile memory array.

33. The data storage system of claim 4, wherein the controller is further configured to support coding for a first memory page format of the multiple non-volatile memory page formats using the pre-defined collection of sets of coding parameters, and the controller is further configured to support coding for a second memory page format of the multiple non-volatile memory page formats using another pre-defined collection of sets of coding parameters of the plurality of pre-defined collections of sets, the first memory page format being different from the second memory page format and the pre-defined collection of sets of coding parameters having a different pre-defined LDPC code word length from the another pre-defined collection of sets of coding parameters.

17. A method for operating a data storage system comprising a non-volatile memory array comprising a plurality of memory pages, the non-volatile memory array accessible through a data channel, the method comprising:

using a first set of low-density parity-check (LDPC) coding parameters to encode at a first code rate first data to be stored into the non-volatile memory array through the data channel, wherein the first set of LDPC coding parameters define a characteristic of a first matrix used to encode the first data;

detecting a change in a condition of the data channel; and

in response to said detecting, using a second set of LDPC coding parameters to encode at a second code rate different from the first code rate second data to be stored into the non-volatile memory array through the data channel,

wherein the second set of LDPC coding parameters define a characteristic of a second matrix used to encode the second data and are different from the first set of LDPC coding parameters.

18. The method of claim 17, further comprising selecting the first or second set of LDPC coding parameters from a pre-defined collection of sets of coding parameters having the same LDPC code word length.

19. The method of claim 18, wherein each set of coding parameters of the pre-defined collection enables coding at a different code rate.

20. The method of claim 18, further comprising selecting the pre-defined collection of sets of coding parameters from a plurality of pre-defined collections of sets, and at least some of the plurality of pre-defined collections of sets have different pre-defined LDPC code word lengths to enable supporting of coding for multiple non-volatile memory page formats.

21. The method of claim 20, wherein at least one of the multiple non-volatile memory page formats does not have a page length that is equal to any of the pre-defined LDPC code word lengths associated with the plurality of pre-defined collections of sets.

22. The method of claim 21, wherein said using the first set of LDPC coding parameters to encode the first data further comprises:

adding an amount of padding data to the first data;

determining parity data for the first data and the padding data using the first set of LDPC coding parameters;

storing the first data and the parity data into the non-volatile memory array through the data channel.

23. The method of claim 22, wherein the amount of the padding data depends at least in part on a difference between the pre-defined LDPC code word length of the first set of LDPC coding parameters and a common memory page size for the non-volatile memory array.

24. The method of claim 17, wherein the change in the condition of the data channel is detected through using at least a signal to noise (SNR) ratio.

25. The method of claim 17, wherein the change in the condition of the data channel is detected through using one or more error statistics including:

a bit error rate encountered during a read operation of a memory page in the non-volatile memory array, an average bit error rate encountered during read operations of a group of memory pages, a program/erase (PE) cycle count, and a number of LPDC iterations used to converge.

26. The method of claim 25, wherein the first and second data are stored in the same block of the non-volatile memory array, and the one or more error statistics is from at least one memory page from the same block.

27. The method of claim 25, wherein the first and second data are stored in the same block of the non-volatile memory array, and the one or more error statistics is from one or more read operations on a block that is different from the block in which the first and second data are stored.

28. The method of claim 27, wherein the one or more error statistics is from one or more memory pages of a reference block.

29. The method of claim 27, wherein the one or more error statistics is from one or more memory pages that have been successfully decoded.

30. The method of claim 17, wherein the first or second set of LDPC coding parameters comprises a P matrix size, a column weight, and a row weight, and further comprises at least one of a code rate, an amount of user data, and an amount of parity data.

31. The method of claim 17, wherein the plurality of memory pages comprises error-correcting code pages (E-pages).

32. The method of claim 17, further comprising storing an indication of a code rate for data written to one or more blocks of memory of the non-volatile memory array.