Display device
First Claim
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1. A display device comprising:
- a first signal line;
a second signal line adjacent to the first signal line;
a third signal line intersecting with the first signal line and the second signal line;
a transistor including a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor film over the gate insulating layer, an oxide insulating layer over the oxide semiconductor film, and electrodes over the oxide semiconductor film and the oxide insulating layer; and
a pixel electrode,wherein the transistor is electrically connected to the first signal line, the third signal line and the pixel electrode,wherein the pixel electrode overlaps with the first signal line in a first region,wherein the pixel electrode overlaps with the second signal line in a second region,wherein an overlapping area between the pixel electrode and the first signal line is substantially equal to an overlapping area between the pixel electrode and the second signal line,wherein the oxide semiconductor film comprises a first semiconductor region and a second semiconductor region in the same film,wherein a resistance of the first semiconductor region is higher than a resistance of the second semiconductor region,wherein the first semiconductor region is a channel formation region which comprises a region of an oxygen-excess state,wherein the second semiconductor region comprises an oxygen deficiency, andwherein the oxide insulating layer is over and in contact with the first semiconductor region.
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Abstract
To provide a display device which can realize multi-gray scale display by reducing voltage fluctuation of a pixel, a display device includes a plurality of source signal lines, a plurality of gate signal lines which is provided so as to intersect with the source signal lines, and a pixel electrode to which a signal voltage of the source signal line is applied through a transistor including an oxide semiconductor, which is provided near an intersection portion of the source signal line and the gate signal line; in which in the pixel electrode which is provided between a pair of the adjacent source signal lines, edge portions thereof overlap with edge portions of the source signal lines and an overlapped area with one of the source signal lines is substantially equal to an overlapped area with the other source signal line.
120 Citations
29 Claims
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1. A display device comprising:
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a first signal line; a second signal line adjacent to the first signal line; a third signal line intersecting with the first signal line and the second signal line; a transistor including a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor film over the gate insulating layer, an oxide insulating layer over the oxide semiconductor film, and electrodes over the oxide semiconductor film and the oxide insulating layer; and a pixel electrode, wherein the transistor is electrically connected to the first signal line, the third signal line and the pixel electrode, wherein the pixel electrode overlaps with the first signal line in a first region, wherein the pixel electrode overlaps with the second signal line in a second region, wherein an overlapping area between the pixel electrode and the first signal line is substantially equal to an overlapping area between the pixel electrode and the second signal line, wherein the oxide semiconductor film comprises a first semiconductor region and a second semiconductor region in the same film, wherein a resistance of the first semiconductor region is higher than a resistance of the second semiconductor region, wherein the first semiconductor region is a channel formation region which comprises a region of an oxygen-excess state, wherein the second semiconductor region comprises an oxygen deficiency, and wherein the oxide insulating layer is over and in contact with the first semiconductor region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A display device comprising:
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a first source signal line; a second source signal line adjacent to the first source signal line; a gate signal line intersecting with the first source signal line and the second source signal line; a transistor including a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor film over the gate insulating layer, an oxide insulating layer over the oxide semiconductor film, and electrodes over the oxide semiconductor film and the oxide insulating layer; and a pixel electrode, wherein the transistor is electrically connected to the first source signal line, the gate signal line and the pixel electrode, wherein the pixel electrode overlaps with the first source signal line in a first region, wherein the pixel electrode overlaps with the second source signal line in a second region, wherein an overlapping area between the pixel electrode and the first source signal line is substantially equal to an overlapping area between the pixel electrode and the second source signal line, wherein the oxide semiconductor film comprises a first semiconductor region and a second semiconductor region in the same film, wherein a resistance of the first semiconductor region is higher than a resistance of the second semiconductor region, wherein the first semiconductor region is a channel formation region which comprises a region of an oxygen-excess state, wherein the second semiconductor region comprises an oxygen deficiency, and wherein the oxide insulating layer is over and in contact with the first semiconductor region. - View Dependent Claims (13, 14, 15, 16)
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17. A transistor comprising:
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a gate electrode; a gate insulating layer over the gate electrode; an oxide semiconductor film over the gate insulating layer; an oxide insulating layer over the oxide semiconductor film; and electrodes over the oxide semiconductor film and the oxide insulating layer; wherein the oxide semiconductor film comprises a first semiconductor region and a second semiconductor region in the same film, wherein a resistance of the first semiconductor region is higher than a resistance of the second semiconductor region, wherein the first semiconductor region is a channel formation region which comprises a region of an oxygen-excess state, wherein the second semiconductor region comprises an oxygen deficiency, and wherein the oxide insulating layer is over and in contact with the first semiconductor region. - View Dependent Claims (18, 19, 20)
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21. A display device comprising:
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a first signal line; a second signal line adjacent to the first signal line; a third signal line intersecting with the first signal line and the second signal line; a transistor including a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, an oxide insulating layer over the oxide semiconductor layer, and electrodes over the oxide semiconductor layer and the oxide insulating layer; and a pixel electrode, wherein the transistor is electrically connected to the first signal line, the third signal line and the pixel electrode, wherein the pixel electrode overlaps with portions of the first signal line and the second signal line, wherein a difference of an overlapping area between the pixel electrode and the first signal line and an overlapping area between the pixel electrode and the second signal line is within 10%, wherein the oxide semiconductor layer comprises a first semiconductor region and a second semiconductor region in the same film, wherein a resistance of the first semiconductor region is higher than a resistance of the second semiconductor region, wherein the first semiconductor region is a channel formation region which comprises a region of an oxygen-excess state, wherein the second semiconductor region comprises an oxygen deficiency, and wherein the oxide insulating layer is over and in contact with the first semiconductor region. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsKoyama, Jun
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Primary Examiner(s)Mai, Anh
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Assistant Examiner(s)LEE, NATHANIEL J.
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Application NumberUS12/972,750Publication NumberTime in Patent Office1,828 DaysField of Search313/500, 438/549US Class Current1/1CPC Class CodesG02F 1/13606 having means for reducing p...G02F 1/136286 Wiring, e.g. gate line, dra...H01L 21/02414 Oxide semiconducting materi...H01L 21/02554 OxidesH01L 21/02565 Oxide semiconducting materi...H01L 21/02631 Physical deposition at redu...
