Semiconductor device

• US 9,219,160 B2
• Filed: 09/25/2012
• Issued: 12/22/2015
• Est. Priority Date: 09/29/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Honda, Tatsuya, Tsubuku, Masashi, Nonaka, Yusuke, Shimazu, Takashi, Yamazaki, Shunpei
• Primary Examiner(s): Ho, Anthony
• Assistant Examiner(s): LAIR, SAMUEL L
• Application Number:
  US13/626,267
• Publication Number:
  US 20130082263A1
• Time in Patent Office: 1,183 Days
• Field of Search: 257/43, 257/57, 438/104
• US Class Current: 1/1
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

A decrease in on-state current in a semiconductor device including an oxide semiconductor film is suppressed. A transistor including an oxide semiconductor film, an insulating film which includes oxygen and silicon, a gate electrode adjacent to the oxide semiconductor film, the oxide semiconductor film provided to be in contact with the insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the interface with the insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region.

Claims

1. A semiconductor device comprising:

a first insulating layer;

an oxide semiconductor layer over and in contact with the first insulating layer;

a source electrode and a drain electrode electrically connected to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer; and

a second insulating layer over and in contact with the oxide semiconductor layer,

wherein the first insulating layer includes silicon and oxygen,

wherein the oxide semiconductor layer includes a first region in contact with the first insulating layer,

wherein a thickness of the first region is 5 nm,

wherein a concentration of silicon in the first region is lower than or equal to 1.0 at. %,

wherein the second insulating layer includes silicon and oxygen,

wherein the oxide semiconductor layer includes a second region in contact with the second insulating layer,

wherein a thickness of the second region is 5 nm,

wherein a concentration of silicon in the second region is higher than 1.0 at. %,

wherein the oxide semiconductor layer includes a third region between the first region and the second region, and

wherein a concentration of silicon in the third region is lower than the concentration of silicon in the first region.

2. The semiconductor device according to claim 1, wherein the gate electrode is located below the oxide semiconductor layer with the first insulating layer interposed therebetween.

3. The semiconductor device according to claim 2, wherein the second insulating layer is a channel protective layer.

4. The semiconductor device according to claim 2, wherein the second insulating layer is a protective insulating layer that covers the oxide semiconductor layer, the source electrode and the drain electrode.

5. The semiconductor device according to claim 1, wherein the concentration of silicon included in the first region is lower than or equal to 0.1 at. %.

6. The semiconductor device according to claim 1,

wherein the first insulating layer includes carbon, and

wherein a concentration of carbon in the first region is lower than or equal to 1.0×

10²⁰ atoms/cm³.

7. The semiconductor device according to claim 1, wherein the oxide semiconductor layer has crystallinity.

8. The semiconductor device according to claim 1, wherein the oxide semiconductor layer has an amorphous structure.

9. The semiconductor device according to claim 8, wherein the oxide semiconductor layer includes a crystal portion.

10. A semiconductor device comprising:

a first insulating layer;

an oxide semiconductor layer over and in contact with the first insulating layer;

a source electrode and a drain electrode electrically connected to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer; and

a second insulating layer over and in contact with the oxide semiconductor layer,

wherein the first insulating layer includes silicon,

wherein the oxide semiconductor layer includes a first region,

wherein a concentration of silicon in the first region is lower than or equal to 1.0 at. %,

wherein the second insulating layer includes silicon,

wherein the oxide semiconductor layer includes a second region,

wherein the concentration of silicon in the first region is lower than a concentration of silicon in the second region,

wherein the oxide semiconductor layer includes a third region between the first region and the second region, and

wherein a concentration of silicon in the third region is lower than the concentration of silicon in the first region.

11. The semiconductor device according to claim 10, wherein the gate electrode is located below the oxide semiconductor layer with the first insulating layer interposed therebetween.

12. The semiconductor device according to claim 11, wherein the second insulating layer is a channel protective layer.

13. The semiconductor device according to claim 11, wherein the second insulating layer is a protective insulating layer that covers the oxide semiconductor layer, the source electrode and the drain electrode.

14. The semiconductor device according to claim 10, wherein the concentration of silicon included in the first region is lower than or equal to 0.1 at. %.

15. The semiconductor device according to claim 10,

wherein the first insulating layer includes carbon, and

wherein a concentration of carbon in the first region is lower than or equal to 1.0×

10²⁰ atoms/cm³.

16. The semiconductor device according to claim 10, wherein the oxide semiconductor layer has crystallinity.

17. The semiconductor device according to claim 10, wherein the oxide semiconductor layer has an amorphous structure.

18. The semiconductor device according to claim 17, wherein the oxide semiconductor layer includes a crystal portion.