Package and manufacturing method of the same

• US 9,219,206 B2
• Filed: 12/23/2010
• Issued: 12/22/2015
• Est. Priority Date: 01/19/2010
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Innotek Company Limited (LG Corporation)
• Inventors: Han, Young Ju, Hwang, Deok Ki, Lim, Jae Chung
• Primary Examiner(s): Chen, Xiaoliang
• Application Number:
  US13/522,902
• Publication Number:
  US 20130020109A1
• Time in Patent Office: 1,825 Days
• Field of Search: 174/255, 174/262, 361/702, 361/728, 361/783, 438/128, 438/637, 438/758, 428/209, 422/122, 298/52, 257/98, 257/629, 257/686
• US Class Current: 1/1
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Provided are a package including a first conductive layer on a patterned layer, an insulating layer on the patterned layer burying the first conductive layer, a second conductive layer on an outer surface of the insulating layer, and a third conductive layer in the insulating layer electrically connecting the first conductive layer with the second conductive layer. A substrate is formed by printing or coating a paste- or ink-type insulator and conductor on a patterned layer formed on a sapphire wafer. No void is created between the substrate and LED chip, thus enhancing attachment strength. The ceramic-containing insulator is cured at a low temperature, thereby minimizing contraction of and damage to the wafer when the ceramic is fired. Printing methods utilizing viscous paste or ink solves problems with co-planarity of substrate that occur in existing wafer-to-wafer bonding processes and renders several steps of the existing substrate manufacturing process unnecessary.

Claims

1. A package comprising:

an LED patterned layer on a substrate;

a first conductive layer on the LED patterned layer;

an insulating layer disposed on the LED patterned layer so as to bury the first conductive layer;

a second conductive layer formed to protrude on an outer surface of the insulating layer where the first conductive layer is disposed; and

a third conductive layer connected to the first conductive layer and the second conductive layer from an inner portion of the insulating layer,

wherein a surface of the second conductive layer is in direct physical contact with both the third conductive layer and the insulating layer,

wherein an uppermost surface of the insulating layer is disposed under a lowest surface of the LED patterned layer,

wherein the insulating layer includes a filler, a resin, a dispersing agent, and an additive, and

wherein the filler includes a phosphor.

2. The package of claim 1, wherein the filler or resin is metal powder selected from Ag, W, Pt, and Pd, and epoxy resin, or ceramic powder using ion conductivity and selected from BaAl₂O₄ or ZnS and epoxy resin, or contains at least one of Si, Al, AlN, Al₂O₃, BN and LTCC (“

Low Temperature Cofired Ceramics”

).