Substrate for semiconductor package and process for manufacturing
First Claim
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1. A semiconductor package, comprising:
- a package substrate, comprising;
a dielectric layera first circuit layer disposed on or in the dielectric layer;
a plurality of pillars disposed on the first circuit layer, wherein each of the pillars has a top surface adapted for making external electrical connection, and the top surfaces of the pillars are substantially coplanar with each other;
a second circuit layer; and
a plurality of interconnection metals;
wherein the dielectric layer has a plurality of openings, and the interconnection metals are disposed in the openings of the dielectric layer to connect the second circuit layer and the circuit layer;
a die attached to the package substrate; and
a molding compound encapsulating the die.
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Abstract
A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.
85 Citations
30 Claims
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1. A semiconductor package, comprising:
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a package substrate, comprising; a dielectric layer a first circuit layer disposed on or in the dielectric layer; a plurality of pillars disposed on the first circuit layer, wherein each of the pillars has a top surface adapted for making external electrical connection, and the top surfaces of the pillars are substantially coplanar with each other; a second circuit layer; and a plurality of interconnection metals; wherein the dielectric layer has a plurality of openings, and the interconnection metals are disposed in the openings of the dielectric layer to connect the second circuit layer and the circuit layer; a die attached to the package substrate; and a molding compound encapsulating the die. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor package, comprising:
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a package substrate, comprising; a dielectric layer having an upper surface; a first circuit layer disposed on or in the dielectric layer; a plurality of pillars disposed on the first circuit layer, wherein heights of the pillars are substantially equal, wherein the heights are defined as the distance between a top end of each of the pillars and the upper surface of the dielectric layer, a second circuit layer; and a plurality of interconnection metals; wherein the dielectric layer has a plurality of openings, and the interconnection metals are disposed in the openings of the dielectric layer to connect the second circuit layer and the first circuit layer; a die attached to the package substrate; and a molding compound encapsulating the die. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A package substrate, comprising:
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a dielectric layer a first circuit layer disposed on or in the dielectric layer; and a plurality of pillars disposed on the first circuit layer, wherein each of the pillars has a recess portion in the top end of the pillar. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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22. A semiconductor package, comprising:
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a package substrate, comprising; a dielectric layer a first circuit layer disposed on or in the dielectric layer; and a plurality of pillars disposed on the first circuit layer, wherein each of the pillars has a recess portion in the top end of the pillar; a die attached to the package substrate; and a molding compound encapsulating the die. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30)
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Specification