Vertical NAND device with shared word line steps
First Claim
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1. A memory device, comprising:
- a memory cell array having a first side and a second side;
a stepped word line contact region located between the first side and the second side of the memory cell array;
a first word line stair pattern located in the stepped word line contact region adjacent to the first side of the memory cell array;
a second word line stair pattern located in the stepped word line contact region adjacent to the second side of the memory cell array; and
a peripheral device region located in the stepped word line contact region between the first and the second word line stair patterns.
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Abstract
A memory device includes a memory cell array having a first side and a second side and a stepped word line contact region located between the first side and the second side of the memory array. A first word line stair pattern is located in the stepped word line contact region adjacent to the first side of the memory array and a second word line stair pattern located in the stepped word line contact region adjacent to the second side of the memory array. A peripheral device region located in the stepped word line contact region between the first and the second word line stair patterns.
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Citations
6 Claims
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1. A memory device, comprising:
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a memory cell array having a first side and a second side; a stepped word line contact region located between the first side and the second side of the memory cell array; a first word line stair pattern located in the stepped word line contact region adjacent to the first side of the memory cell array; a second word line stair pattern located in the stepped word line contact region adjacent to the second side of the memory cell array; and a peripheral device region located in the stepped word line contact region between the first and the second word line stair patterns. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification