Semiconductor device and method for manufacturing same

• US 9,224,869 B2
• Filed: 09/09/2013
• Issued: 12/29/2015
• Est. Priority Date: 09/12/2012
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Shimada, Yukimine, Nishiki, Hirohiko, Kitoh, Kenichi
• Primary Examiner(s): Kebede, Brook
• Application Number:
  US14/427,401
• Publication Number:
  US 20150206979A1
• Time in Patent Office: 841 Days
• Field of Search: 257 43- 50, 257/E21.414, 257/E21.415, 438149-167
• US Class Current: 1/1
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/50 Protective arrangements
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

This semiconductor device (101) includes: a substrate (1); a thin-film transistor (10) which includes an oxide semiconductor layer (6) as its active layer; a protective layer (11) covering the thin-film transistor; a metal layer (9d, 9t) interposed between the protective layer (11) and the substrate (1); a transparent conductive layer (13, 13t) formed on the protective layer (11); and a connecting portion (20, 30) to electrically connect the metal layer (9d, 9t) and the transparent conductive layer (13, 13t) together. The connecting portion (20, 30) includes an oxide connecting layer (6a, 6t) which is formed out of a same oxide film as a oxide semiconductor layer (6) and which has a lower electrical resistance than the oxide semiconductor layer (6). The metal layer (9d, 9t) is electrically connected to the transparent conductive layer (13, 13t) via the oxide connecting layer (6a, 6t).

Claims

1. A semiconductor device comprising:

a substrate;

a thin-film transistor which is supported on the substrate and which includes an oxide semiconductor layer as its active layer;

a protective layer covering the thin-film transistor;

a metal layer interposed between the protective layer and the substrate;

a transparent conductive layer formed on the protective layer; and

a connecting portion to electrically connect the metal layer and the transparent conductive layer together,

wherein the connecting portion includes an oxide connecting layer which is formed out of a same oxide film as the oxide semiconductor layer and which has a lower electrical resistance than the oxide semiconductor layer, and

the metal layer is electrically connected to the transparent conductive layer via the oxide connecting layer.

2. The semiconductor device of claim 1, wherein the protective layer has a hole portion which is located over the oxide connecting layer, and

the transparent conductive layer is in contact with the oxide connecting layer inside the hole portion of the protective layer.

3. The semiconductor device of claim 1, wherein in the connecting portion, the transparent conductive layer is not directly in contact with the metal layer.

4. The semiconductor device of claim 3, wherein the metal layer has a hole over the oxide connecting layer and a sidewall of the hole is covered with the protective layer.

5. The semiconductor device of claim 1, wherein the connecting portion is a drain-pixel electrode connecting portion,

the metal layer is a drain electrode of the thin film transistor, and the transparent conductive layer is a pixel electrode.

6. The semiconductor device of claim 1, wherein the connecting portion is a terminal portion, and

the metal layer is a source connecting layer which is formed out of a same conductive film as source and drain electrodes of the thin film transistor.

7. The semiconductor device of claim 1, wherein the metal layer includes a metal which is able to cause electrolytic corrosion reaction with the transparent conductive layer.

8. The semiconductor device of claim 7, wherein the metal layer includes aluminum.

9. The semiconductor device of claim 8, wherein the metal layer has a multilayer structure including a lower layer and an upper layer, the lower layer including a barrier metal, the upper layer including aluminum.

10. The semiconductor device of claim 1, wherein the oxide semiconductor layer and the oxide connecting layer include In, Ga and Zn.

11. The semiconductor device of claim 10, wherein the oxide semiconductor layer and the oxide connecting layer include a crystalline In—

Ga—

Zn—

O based oxide.

12. The semiconductor device of claim 1, wherein the thin-film transistor further includes an etch stop layer which is in contact with a channel region of the oxide semiconductor layer.

13. A method for fabricating the semiconductor device of claim 12, the method comprising the steps of:

(a) providing a substrate, on which a gate electrode and a gate insulating layer are formed;

(b) forming an oxide semiconductor film on the gate insulating layer and patterning the oxide semiconductor film, thereby forming a first oxide semiconductor layer to be an active layer for a thin-film transistor and a second oxide semiconductor layer to be an oxide connecting layer;

(c) forming an etch stop layer to contact with the first oxide semiconductor layer at least partially;

(d) performing a resistance lowering process to lower a resistance of the second oxide semiconductor layer, thereby turning the second oxide semiconductor layer into an oxide connecting layer;

(e) forming a metal layer to cover the oxide connecting layer partially;

(f) forming a protective layer over the metal layer and forming, in the protective layer, a hole portion exposing at least partially a portion of the oxide connecting layer that is not covered with the metal layer; and

(g) forming a transparent conductive film over the protective layer and inside the hole portion and patterning the transparent conductive film, thereby forming a transparent conductive layer to contact with the oxide connecting layer inside the hole portion.

14. The method of claim 13, wherein the oxide semiconductor film includes In, Ga and Zn.

15. The method of claim 14, wherein the oxide semiconductor film includes a crystalline In—

Ga—

Zn—

O based oxide.

16. A method for fabricating the semiconductor device of claim 1, the method comprising the steps of:

(A) providing a substrate, on which a gate electrode and a gate insulating layer are formed;

(B) forming an oxide semiconductor film on the gate insulating layer and patterning the oxide semiconductor film, thereby forming a first oxide semiconductor layer to be an active layer for a thin-film transistor and a second oxide semiconductor layer to be an oxide connecting layer;

(C) forming a metal layer to cover the second oxide semiconductor layer partially;

(D) forming a protective layer over the metal layer and forming in the protective layer, a hole portion exposing at least partially a portion of the second oxide semiconductor layer that is not covered with the metal layer;

(E) performing a resistance lowering process to lower a resistance of that portion of the second oxide semiconductor layer that is exposed by the hole portion, thereby turning the second oxide semiconductor layer into an oxide connecting layer; and

(F) forming a transparent conductive film over the protective layer and inside the hole portion and patterning the transparent conductive film, thereby forming a transparent conductive layer to contact with the oxide connecting layer inside the hole portion.

17. The method of claim 16, wherein the oxide semiconductor film includes In, Ga and Zn.

18. The method of claim 17, wherein the oxide semiconductor film includes a crystalline In—

Ga—

Zn—

O based oxide.