Electro-static discharge protective circuit and display substrate and display device having the same

• US 9,225,166 B2
• Filed: 06/20/2014
• Issued: 12/29/2015
• Est. Priority Date: 04/21/2014
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Li, Yongqian
• Primary Examiner(s): PATEL, DHARTI HARIDAS
• Application Number:
  US14/310,371
• Publication Number:
  US 20150303686A1
• Time in Patent Office: 557 Days
• Field of Search: 257/59
• US Class Current: 1/1
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H02H 9/046 responsive to excess voltage appearing at terminals of integrated circuits protection by specific structural integration design H01L27/0248

Abstract

The present invention relates to display technology. It discloses an electro-static discharge protective circuit comprising: a first thin film transistor having a first source electrode connected to a first reference level end, and a first gate electrode and a first drain electrode connected with each other at a first node; a second thin film transistor having a second source electrode connected to said first node, and a second gate electrode and a second drain electrode connected with each other at a discharge end; a third thin film transistor having a third source electrode connected to said discharge end, and a third gate electrode and a third drain electrode connected with each other at a second node, wherein said second node is connected with said first node; and a fourth thin film transistor having a fourth source electrode connected at said second node, and a fourth gate electrode and a fourth drain electrode connected to a second reference level end. The electro-static discharge protective circuit according to the present invention can reduce a risk of circuit breakdown and failure. Correspondingly, the present invention also discloses a display substrate and a display device having the abovementioned electro-static discharge protective circuit.

Claims

1. An electro-static discharge protective circuit, comprising:

a first thin film transistor having a first source electrode connected to a first reference level end, and a first gate electrode and a first drain electrode connected with each other at a first node;

a second thin film transistor having a second source electrode connected to said first node, and a second gate electrode and a second drain electrode connected with each other at a discharge end;

a third thin film transistor having a third source electrode connected to said discharge end, and a third gate electrode and a third drain electrode connected with each other at a second node, wherein said second node is connected with said first node; and

a fourth thin film transistor having a fourth source electrode connected to said second node, and a fourth gate electrode and a fourth drain electrode connected to a second reference level end.

2. The electro-static discharge protective circuit according to claim 1, wherein said first to fourth thin film transistors are N-type thin film transistors, said first reference level end is a high level end, and said second reference level end is a low level end.

3. The electro-static discharge protective circuit according to claim 1, wherein said first to fourth thin film transistors are P-type thin film transistors, said first reference level end is a low level end, and said second reference level end is a high level end.

7. A display substrate, comprising:

an electro-static discharge protective circuit according to claim 1, having the discharge end connected to a signal line in said display substrate.

8. The display substrate according to claim 7, wherein said signal line is a data line.

9. The display substrate according to claim 7, wherein said signal line is a gate line.

13. A display device comprising a display substrate according to claim 7.

4. An electro-static discharge protective circuit, comprising:

a first thin film transistor having a first source electrode connected to a first reference level end, and a first gate electrode and a first drain electrode connected with each other at a first node;

a second thin film transistor having a second source electrode connected to said first node, and a second gate electrode and a second drain electrode connected with each other at a discharge end;

a third thin film transistor having a third source electrode connected to said discharge end, and a third gate electrode and a third drain electrode connected with each other at a second node;

a capacitor having a first end connected to said first node and a second end connected to said second node; and

a fourth thin film transistor having a fourth source electrode connected to said second node, and a fourth gate electrode and a fourth drain electrode connected to a second reference level end.

5. The electro-static discharge protective circuit according to claim 4, wherein said first to fourth thin film transistors are N-type thin film transistors, said first reference level end is a high level end, and said second reference level end is a low level end.

6. The electro-static discharge protective circuit according to claim 4, wherein said first to fourth thin film transistors are P-type thin film transistors, said first reference level end is a low level end, and said second reference level end is a high level end.

10. A display substrate comprising:

an electro-static discharge protective circuit according to claim 4, having the discharge end connected to a signal line in said display substrate.

11. The display substrate according to claim 10, wherein said signal line is a data line.

12. The display substrate according to claim 10, wherein said signal line is a gate line.

14. A display device comprising a display substrate according to claim 10.