Current-starved inverter circuit
First Claim
1. A current-starved inverter circuit for generating an output voltage signal based on an input voltage signal, the current-starved inverter circuit comprising:
- a first current-mirror circuit, connected to first and second supply voltages, for generating a first source current;
a second current-mirror circuit, connected to the first and second supply voltages, for generating a first sink current;
a first transistor having a source terminal connected to the first current-mirror circuit for receiving the first source current, a gate terminal for receiving the input voltage signal, and a drain terminal for outputting the output voltage signal;
a second transistor having a source terminal connected to the second current-mirror circuit for receiving the first sink current, a gate terminal for receiving the input voltage signal, and a drain terminal connected to the drain terminal of the first transistor for outputting the output voltage signal;
a detector circuit, connected to the drain terminals of the first and second transistors, for receiving the output voltage signal and generating a first detection signal when the output voltage signal exceeds a first threshold voltage level and a second detection signal when the output voltage signal is less than a second threshold voltage level; and
a current-booster circuit, connected to the detector circuit and the first and second transistors, for receiving the first and second detection signals, generating a second source current based on the first detection signal and a second sink current based on the second detection signal, providing the second source current to the source terminal of the first transistor, thereby pulling up a voltage level of the output voltage signal to the voltage level of the first supply voltage, and providing the second sink current to the source terminal of the second transistor, thereby pulling down the voltage level of the output voltage signal to the voltage level of the second supply voltage.
16 Assignments
0 Petitions
Accused Products
Abstract
A current-starved inverter circuit includes first and second current-mirror circuits, first and second transistors, a detector, and a current-booster. The first and second transistors receive a first source current and a first sink current from the first and second current-mirror circuits, respectively, and an input voltage signal, and generate an inverted input voltage signal (an output voltage signal). The detector generates a first detection signal when the output voltage signal exceeds a first threshold value and a second detection signal when the output voltage signal is less than a second threshold value. The current-booster, which is connected to the detector, receives the first and second detection signals and provides a second source current and a second sink current to the first and second transistors to pull-up and pull-down a voltage level of the output voltage signal, respectively.
17 Citations
11 Claims
-
1. A current-starved inverter circuit for generating an output voltage signal based on an input voltage signal, the current-starved inverter circuit comprising:
-
a first current-mirror circuit, connected to first and second supply voltages, for generating a first source current; a second current-mirror circuit, connected to the first and second supply voltages, for generating a first sink current; a first transistor having a source terminal connected to the first current-mirror circuit for receiving the first source current, a gate terminal for receiving the input voltage signal, and a drain terminal for outputting the output voltage signal; a second transistor having a source terminal connected to the second current-mirror circuit for receiving the first sink current, a gate terminal for receiving the input voltage signal, and a drain terminal connected to the drain terminal of the first transistor for outputting the output voltage signal; a detector circuit, connected to the drain terminals of the first and second transistors, for receiving the output voltage signal and generating a first detection signal when the output voltage signal exceeds a first threshold voltage level and a second detection signal when the output voltage signal is less than a second threshold voltage level; and a current-booster circuit, connected to the detector circuit and the first and second transistors, for receiving the first and second detection signals, generating a second source current based on the first detection signal and a second sink current based on the second detection signal, providing the second source current to the source terminal of the first transistor, thereby pulling up a voltage level of the output voltage signal to the voltage level of the first supply voltage, and providing the second sink current to the source terminal of the second transistor, thereby pulling down the voltage level of the output voltage signal to the voltage level of the second supply voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A current-starved inverter circuit, for generating an output voltage signal based on an input voltage signal, the current-starved inverter circuit comprising:
-
a first current-mirror circuit, connected to first and second supply voltages, for generating a first source current; a second current-mirror circuit, connected to the first and second supply voltages, for generating a first sink current; a first transistor having a source terminal connected to the first current-mirror circuit for receiving the first source current, a gate terminal for receiving the input voltage signal, and a drain terminal for providing the output voltage signal; a second transistor having a source terminal connected to the second current-mirror circuit for receiving the first sink current, a gate terminal for receiving the input voltage signal, and a drain terminal connected to the drain terminal of the first transistor for providing the output voltage signal; a first inverter, connected to the drain terminals of the first and second transistors and having a first trip point equal to a first threshold voltage level, for receiving the output voltage signal, and generating a first detection signal when the output voltage signal exceeds the first trip point; a second inverter, connected to the drain terminals of the first and second transistors and having a second trip point equal to a second threshold voltage level, for receiving the output voltage signal, and generating a second detection signal when the output voltage signal is less than the second trip point; a third transistor having a source terminal connected to the first supply voltage, a gate terminal connected to the first inverter for receiving the first detection signal, and a drain terminal connected to the source terminal of the first transistor for generating a second source current based on the first detection signal and providing the second source current to the source terminal of the first transistor, thereby pulling up a voltage level of the output voltage signal to the voltage level of the first supply voltage; and a fourth transistor having a source terminal connected to the second supply voltage, a gate terminal connected to the second inverter for receiving the second detection signal, and a drain terminal connected to the source terminal of the second transistor for generating a second sink current based on the second detection signal and providing the second sink current to the source terminal of the second transistor, thereby pulling down the voltage level of the output voltage signal to the voltage level of the second supply voltage. - View Dependent Claims (9, 10, 11)
-
Specification