Methods of selective removal of blocking dielectric in NAND memory strings
First Claim
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1. A method of making a monolithic, three dimensional NAND string, comprising:
- forming a stack of alternating layers of a first material and a second material different than the first material over a substrate;
etching the stack to form a front side opening in the stack;
forming at least one memory film over a sidewall of the front side opening;
forming a semiconductor channel over the at least one memory film in the front side opening;
etching the stack to form a back side opening in the stack, the backside opening including a pair of oppositely disposed sidewalls and a bottom surface;
removing by etching at least a portion of the second material layers through the back side opening to form back side recesses between the first material layers;
forming a blocking dielectric over the sidewalls and bottom surface of the backside opening and within the back side recesses;
forming control gates comprising a metal material over the blocking dielectric in the back side recesses through the back side opening, wherein each control gate comprises a first side surface facing the semiconductor channel in the front side opening and a second side surface opposite the first side surface that forms a portion of a sidewall of the back side opening;
oxidizing a portion of the metal material of the control gates adjacent to the second side surfaces of the control gates; and
etching the back side opening using a wet chemical etch to remove the blocking dielectric from the sidewalls and the bottom surface of the backside opening.
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Abstract
Methods of making a monolithic three dimensional NAND string may enable selective removal of a blocking dielectric material, such as aluminum oxide, without otherwise damaging the device. Blocking dielectric may be selectively removed from the back side (e.g., slit trench) and/or front side (e.g., memory opening) of the NAND string. Also disclosed are NAND strings made in accordance with the embodiment methods.
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Citations
39 Claims
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1. A method of making a monolithic, three dimensional NAND string, comprising:
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forming a stack of alternating layers of a first material and a second material different than the first material over a substrate; etching the stack to form a front side opening in the stack; forming at least one memory film over a sidewall of the front side opening; forming a semiconductor channel over the at least one memory film in the front side opening; etching the stack to form a back side opening in the stack, the backside opening including a pair of oppositely disposed sidewalls and a bottom surface; removing by etching at least a portion of the second material layers through the back side opening to form back side recesses between the first material layers; forming a blocking dielectric over the sidewalls and bottom surface of the backside opening and within the back side recesses; forming control gates comprising a metal material over the blocking dielectric in the back side recesses through the back side opening, wherein each control gate comprises a first side surface facing the semiconductor channel in the front side opening and a second side surface opposite the first side surface that forms a portion of a sidewall of the back side opening; oxidizing a portion of the metal material of the control gates adjacent to the second side surfaces of the control gates; and etching the back side opening using a wet chemical etch to remove the blocking dielectric from the sidewalls and the bottom surface of the backside opening. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of making a monolithic, three dimensional NAND string, comprising:
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forming a stack of alternating layers of a first material and a second material different than the first material over a substrate; etching the stack to form a front side opening in the stack; forming a blocking dielectric on a sidewall and a bottom surface of the front side opening; forming a charge storage layer over the blocking dielectric on the sidewall and bottom surface of the front side opening; forming a tunnel dielectric layer over the charge storage layer on the sidewall and bottom surface of the front side opening; forming a semiconductor cover layer over the tunnel dielectric layer on the sidewall and bottom surface of the front side opening; removing by a first etching process portions of the semiconductor cover layer, the tunnel dielectric layer and the charge storage layer over the bottom surface of the front side opening to expose the blocking dielectric over the bottom surface of the front side opening; forming a protective oxide layer over the semiconductor cover layer on the sidewall of the front side opening; removing by a second etching process the blocking dielectric over the bottom surface of the front side opening, wherein the protective oxide layer protects the semiconductor cover layer on the sidewall of the front side opening from etching damage during the second etching process, and the second etching process is different from the first etching process; removing by a third etching process the protective oxide layer to expose the semiconductor cover layer on the sidewall of the front side opening, wherein the third etching process is different from the second etching process; and forming a semiconductor channel over the semiconductor cover layer over the sidewall of the front side opening and contacting the bottom surface of the front side opening. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A method of making a monolithic three dimensional NAND string, comprising:
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forming a stack of alternating layers of a first material and a second material different than the first material over a substrate; etching the stack to form a front side opening in the stack comprising a sidewall and a bottom surface; removing a first portion of the second material layers through the front side opening to form front side recesses between the first material layers on the sidewall of the front side opening; forming a blocking dielectric over the sidewall and bottom surface of the front side opening and within the front side recesses; forming an oxide cover layer over the blocking dielectric on the sidewall and bottom surface of the front side opening and within the front side recesses; removing by etching a first portion of the oxide cover layer from the sidewall and the bottom surface of the front side opening to provide discrete segments of a second portion of the oxide cover layer within the respective front side recesses; removing by etching a first portion of the blocking dielectric from the sidewall and the bottom surface of the front side opening to provide discrete segments of a second portion of the blocking dielectric within the respective front side recesses, wherein the discrete segments of the oxide cover layer prevent the blocking dielectric within the front side recesses from being etched; removing by etching the discrete segments of the second portion of the oxide cover layer from the front side recesses; forming a charge storage layer on the sidewall and bottom surface of the front side opening and over the discrete segments of the second portion of the blocking dielectric within the front side recesses; forming a tunnel dielectric layer over the charge storage layer on the sidewall and bottom surface of the front side opening; forming a semiconductor cover layer over the tunnel dielectric layer on the sidewall and bottom surface of the front side opening; removing by etching portions of the semiconductor cover layer, the tunnel dielectric layer and the charge storage layer over the bottom surface of the front side opening; and forming a semiconductor channel over the semiconductor cover layer over the sidewall of the front side opening and contacting the bottom surface of the front side opening. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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Specification