Nonvolatile semiconductor memory device and manufacturing method thereof, semiconductor device and manufacturing method thereof, and manufacturing method of insulating film

• US 9,231,070 B2
• Filed: 05/23/2011
• Issued: 01/05/2016
• Est. Priority Date: 05/26/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kakehata, Tetsuya, Tanaka, Tetsuhiro, Asami, Yoshinobu
• Primary Examiner(s): Miyoshi, Jesse Y
• Application Number:
  US13/113,255
• Publication Number:
  US 20110227139A1
• Time in Patent Office: 1,688 Days
• Field of Search: 257/629, 257/932, 257/639, 257/640, 257/649, 257/E21.212, 438/771, 438/772
• US Class Current: 1/1
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/0223 formation by oxidation, e.g. oxidation of the substrate
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/3143 composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31637 Deposition of Tantalum oxides, e.g. Ta2O5
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 : Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×10¹¹ cm⁻³ or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.

Claims

1. A semiconductor device comprising:

a first insulating film;

a pair of impurity regions over the first insulating film;

a semiconductor region having a channel formation region between the pair of impurity regions; and

a gate electrode over the semiconductor region with a gate insulating film interposed therebetween,

wherein the gate insulating film has a hydrogen concentration of 5×

10¹⁹ atoms/cm³ or less,

wherein the gate insulating film includes a region having a hydrogen concentration of 1×

10²⁰ atoms/cm³ or more, the region being positioned in the vicinity of a surface of the gate insulating film,

wherein the gate insulating film is formed by performing a plasma oxidation treatment on an insulating film formed b a CVD method a sputtering method or a thermal oxidation method,

wherein the gate insulating film comprises;

a first region covering the pair of impurity regions and the semiconductor region, and

a second region being in contact with the first insulating film, and

wherein a thickness of the gate insulating film in the first region is larger than that in the second region.

2. The semiconductor device according to claim 1, wherein the gate insulating film comprises silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, tantalum oxide, or hafnium oxide.

3. The semiconductor device according to claim 1, wherein the gate insulating film comprises an element of a noble gas.

4. The semiconductor device according to claim 1, wherein the semiconductor region is formed in a semiconductor film over a substrate.

5. The semiconductor device according to claim 4, wherein the semiconductor film comprises silicon as its main component.

6. The semiconductor device according to claim 1, wherein the semiconductor region is formed over a single-crystal Si substrate.

7. The semiconductor device according to claim 1, wherein the semiconductor region is formed in an SOI substrate.

8. The semiconductor device according to claim 1, wherein the semiconductor region is formed in a compound semiconductor substrate.

9. A electronic appliance comprising the semiconductor device according to claim 1, wherein the electronic appliance is a camera, a goggle type display, a navigation system, a sound reproducing device, a computer, a game machine, a mobile information terminal, or an image reproducing device.

10. The semiconductor device according to claim 1, further comprising:

a sidewall insulating layer in contact with side surfaces of the gate electrode; and

a second insulating film in contact with the gate insulating film, the gate electrode, and the sidewall insulating layer,

wherein the second insulating film is formed of an organic material or a siloxane material.

11. A semiconductor device comprising:

a first insulating film;

a semiconductor region having a channel formation region, a pair of first impurity regions and a pair of second impurity regions over the first insulating film;

a gate electrode over the semiconductor region with a gate insulating film interposed therebetween;

wherein the channel formation region is between the pair of first impurity regions,

wherein the channel formation region and the pair of first impurity regions are between the pair of second impurity regions,

wherein an impurity concentration of the pair of first impurity regions is lower than that of the pair of second impurity regions,

wherein the gate insulating film has a hydrogen concentration of 5×

10¹⁹ atoms/cm³ or less,

wherein the gate insulating film includes a region having a hydrogen concentration of 1×

10²⁰ atoms/cm³ or more, the region being positioned in the vicinity of a surface of the gate insulating film,

wherein the gate insulating film is formed by performing a plasma oxidation treatment on an insulating film formed by a CVD method, a sputtering method, or a thermal oxidation method,

wherein the gate insulating film comprises;

a first region covering the semiconductor region, the pair of first impurity regions, and the pair of second impurity regions, and

a second region being in contact with the first insulating film,

wherein a thickness of the gate insulating film in the first region is larger than that in the second region.

12. The semiconductor device according to claim 11, wherein the gate insulating film comprises silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, tantalum oxide, or hafnium oxide.

13. The semiconductor device according to claim 11, wherein the gate insulating film comprises an element of a noble gas.

14. The semiconductor device according to claim 11, wherein the semiconductor region is formed in a semiconductor film over a substrate.

15. The semiconductor device according to claim 14, wherein the semiconductor film comprises silicon as its main component.

16. The semiconductor device according to claim 11, wherein the semiconductor region is formed over a single-crystal Si substrate.

17. The semiconductor device according to claim 11, wherein the semiconductor region is formed in an SOI substrate.

18. The semiconductor device according to claim 11, wherein the semiconductor region is formed in a compound semiconductor substrate.

19. A electronic appliance comprising the semiconductor device according to claim 11, wherein the electronic appliance is a camera, a goggle type display, a navigation system, a sound reproducing device, a computer, a game machine, a mobile information terminal, or an image reproducing device.

20. The semiconductor device according to claim 11, further comprising:

a sidewall insulating layer in contact with side surfaces of the gate electrode; and

a second insulating film in contact with the gate insulating film, the gate electrode, and the sidewall insulating layer,

wherein the second insulating film is formed of an organic material or a siloxane material.