Trim method for high voltage drivers

• US 9,231,590 B1
• Filed: 03/15/2014
• Issued: 01/05/2016
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: David Schie, David Spady, Mike Ward
• Original Assignee: David Schie, David Spady, Mike Ward
• Inventors: Schie, David, Ward, Mike, Spady, David
• Primary Examiner(s): Richardson, Jany
• Application Number:
  US14/214,716
• Publication Number:
  US 20150381176A1
• Time in Patent Office: 661 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G05F 3/02 Regulating voltage or current
• CPC Class Codes: H03K 19/0005 Modifications of input or output impedance

Abstract

Methods and circuits are provided to create small, power minimizing, multi-channel high voltage drivers for micro-electromechanical systems (MEMS). A resistor calibration circuit is introduced to allow on chip resistor dividers to be calibrated against a single precision high voltage resistor divider, eliminating the cost and printed circuit board real estate associated with multiple resistor dividers connected to each channel. Additionally, a multiple-power rail configuration is provided to reduce power to the overall system by producing several rails generated by a boost converter or a capacitive charge pump, where the voltage output of the rails is produced to group rails of lesser voltage requirement rather than connecting all channels to the same high voltage rail on a dynamic basis.

Claims

1. An integrated circuit driver for driving at least one accurate high-voltage outputs comprising:

at least one high voltage driver channel output terminals;

an external precision high impedance resistor divider coupled externally to said at least one high voltage divider channel output terminals;

an internal resistor divider coupled to said at least one high voltage divider output terminals; and

a resistor calibration circuit;

wherein said one or more internal resistor dividers are calibrated in conformance with said external precision high impedance resistor divider until a voltage on a set of divider taps match.

2. The integrated circuit driver of claim 1, wherein said resistor calibration circuit comprises:

a high impedance on chip resistor divider;

a window comparator coupled to said external precision high impedance resistor divider and said internal resistor divider; and

a voltage source output or pair of mirrored current source outputs whose magnitude conforms to a command from a controller, said voltage source output or said pair of mirrored current source outputs coupled to said internal resistor divider and said external precision high impedance resistor dividers;

wherein internal resistors are modified in conformance with said window comparator output to increase a tap point voltage or reduce the tap point voltage until the voltage on the internal resistor divider equals the voltage on the tap point of the external precision high impedance resistor divider as indicated when the voltage is within the hysteresis band of said comparator.

3. The integrated circuit driver of claim 2, wherein said window comparator has a positive magnitude output for increment, a negative magnitude output for decrement, and an intermediate magnitude output for equal or near equal voltage magnitude.

4. The integrated circuit driver of claim 1, wherein said resistor calibration circuit comprises:

an internal high impedance monolithic resistor divider whose value is established by digital means;

a window comparator coupled to said external precision high impedance resistor divider and said internal high impedance monolithic resistor divider;

a said precision external resistor divider; and

a voltage or pair of matched current sources with programmable magnitude coupled to a command input and to each of said internal and external resistor dividers, where said magnitude is adjusted in conformance with said input command to produce a command voltage on the external resistor divider;

wherein said window comparator compares the voltage on the external precision high impedance resistor divider and said internal resistor dividers and increments or decrements the value of the internal resistor divider magnitude until two tap voltages match within the window comparator window (hysteresis).

5. The integrated circuit of claim 1 further comprising:

at least one high voltage rail coupled to said high voltage driver channel output terminals;

at least one high voltage power rail generator;

a controller coupled to said at least one high voltage power rail generators; and

a high voltage multiplexer;

wherein said power rail voltages are dynamically established by said controller which further groups channels to be coupled to a given high voltage rail and then couples them to said given high voltage rails using said high voltage multiplexer so as to minimize total system power consumption.

6. The integrated circuit of claim 5 further comprising one or more boost converters, said boost converters included monolithically.

7. The integrated circuit of claim 6, wherein said boost converters are created in a dielectrically isolated process to isolate its switching noise from other circuits.

8. The integrated circuit of claim 5 further comprising at least one charge pump stages, said at least one charge pump stages included monolithically.

9. The integrated circuit of claim 8, wherein said at least one charge pumps stages are created in a dielectrically isolated process to isolate its switching noise from other circuits.

10. The integrated circuit of claim 8, wherein the at least one high voltage power rail generator creates multiple rails using a single switch and single feedback loop.

11. The integrated circuit of claim 5 further comprising a sub-regulator so as to create a sub-regulated voltage for each channel so as to isolate each channel from glitches associated with at least one of changing the magnitude of the high voltage rails and to produce output rails which conform to a maximum voltage that can be accommodated by selected semiconductor devices.

12. The integrated circuit of claim 5, wherein the at least one high voltage power rail generator creates multiple rails using a single switch and single feedback loop.

13. The integrated circuit driver of claim 1 further comprising a multiplexer connecting said external precision high impedance resistor divider to said resistor calibration circuit.

14. The integrated circuit of claim 1, wherein said internal resistor divider is multiplexed to said resistor calibration circuit in a continuous or periodic pattern so as to continuously calibrate said internal resistore divider.

15. The integrated circuit of claim 1, wherein said internal resistor divider are multiplexed to said resistor calibration circuit when commanded by an external controller provided either directly to a terminal or through a digital bus.

16. A precision multi-channel monolithic voltage regulation circuit comprising:

a closed loop amplifier;

a level shift;

an internal divider feedback network calibrated against an external precision resistor divider; and

wherein said closed loop amplifier couples a voltage to an output terminal utilizing said level shift or said transconductor in conformance with the calibrated internal divider feedback network.