Receiver design for geo-location and/or phase coherent processing
First Claim
1. A method for synchronizing a plurality of radio frequency receivers, the method comprising:
- a) providing said plurality of radio frequency receivers, each one of said radio frequency receivers being equipped with an ultra high speed clock for clocking a reception of radio signals for said receivers, said receivers being for synchronizing with one another, said ultra-high speed clock having a frequency of at least one gigahertz;
b) deploying each of said plurality of radio frequency receivers to a single physical location to thereby locate said plurality of radio frequency receivers at said single physical location;
c) simultaneously activating said clocks of said plurality of radio frequency receivers using a common trigger to thereby synchronize said clocks of said plurality of radio frequency receivers to one another;
d) placing each of said plurality of radio frequency receivers in hibernation such that each radio frequency receiver'"'"'s clock is operational and continues its clocking;
e) deploying each of said radio frequency receivers to different locations such that each of said radio frequency receivers is physically remote from each other;
wherein said plurality of radio frequency receivers are used to determine a time of arrival of said radio signals.
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Accused Products
Abstract
A receiver system using commercially available super high-speed data converters that are able to directly digitize at multiple GHz sampling rates with sufficient accuracy to fit many radio applications. Unlike conventional receivers, no down converters or mixing stages are required. Instead it uses a bank of RF filters from which the desired RF filter, based on the frequency band of interest, is switched in. The frequency spectrum scan rate is very fast as the settling time for the simple RF front-end is small and the speed of RF switching is high. The filtered output is digitized at a multiple GHz sampling rate and all signal processing is done by FPGA or a combination of FPGA and/or a general-purpose processor.
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Citations
15 Claims
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1. A method for synchronizing a plurality of radio frequency receivers, the method comprising:
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a) providing said plurality of radio frequency receivers, each one of said radio frequency receivers being equipped with an ultra high speed clock for clocking a reception of radio signals for said receivers, said receivers being for synchronizing with one another, said ultra-high speed clock having a frequency of at least one gigahertz; b) deploying each of said plurality of radio frequency receivers to a single physical location to thereby locate said plurality of radio frequency receivers at said single physical location; c) simultaneously activating said clocks of said plurality of radio frequency receivers using a common trigger to thereby synchronize said clocks of said plurality of radio frequency receivers to one another; d) placing each of said plurality of radio frequency receivers in hibernation such that each radio frequency receiver'"'"'s clock is operational and continues its clocking; e) deploying each of said radio frequency receivers to different locations such that each of said radio frequency receivers is physically remote from each other; wherein said plurality of radio frequency receivers are used to determine a time of arrival of said radio signals. - View Dependent Claims (2, 3)
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4. A system for receiving multiple wireless signals, the system comprising:
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at least two radio frequency receivers for receiving said wireless signals and for digitizing wireless signals received, each of said at least two radio frequency receivers comprises an ultra-high speed clock for clocking digitization of said wireless signals, said ultra-high speed clock having a clock frequency of at least one gigahertz; a central processing station controlling said at least two radio frequency receivers, said central processing station being physically remote from each of said at least two radio frequency receivers; an ultra-high speed data link connecting said at least two radio frequency receivers and said central processing station; wherein said at least two radio frequency receivers receive said wireless signals, digitizes said wireless signals, and sends digitized wireless signals to said central processing station by way of said data link; said ultra-high speed clock is also used for clocking a reception of radio signals for said receivers and said receivers being for synchronizing with one another; each of said at least two radio frequency receivers is devoid of down conversion circuitry and of signal mixing circuitry; said ultra-high speed clock at each of said at least two radio frequency receivers synchronized with each other'"'"'s ultra-high speed clock, said ultra-high speed clocks of said at least two radio frequency receivers being synchronized with each other by; a) deploying each of said ultra-high speed clocks to a single physical location, b) simultaneously activating said ultra-high speed clocks using a common trigger to thereby synchronize said ultra-high speed clocks with each other, c) placing each of said ultra-high speed clocks in hibernation and, after synchronizing with each other, d) deploying each of said ultra-high speed clocks to physical locations which are physically remote from one another; said system being used to determine a time of arrival of said wireless signals. - View Dependent Claims (5, 6, 7, 8, 9, 10, 11)
wherein said digitized signal from said ADC is transmitted to said central processing station by way of said ultra-high speed data link.
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12. A receiver system for receiving wireless signals, the receiver comprising:
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a low noise amplifier for amplifying wireless signals received by said receiver system to result in an amplified signal; a plurality of RF filters for receiving and filtering said amplified signal, each of said RF filters being for filtering and isolating at least one frequency band of said amplified signal, each of said RF filters producing an isolated frequency band signal; a high speed analog to digital converter (ADC) for digitizing an isolated signal from one of said plurality of RF filters to result in a digitized signal, said ADC being for digitizing said isolated signal at a sampling rate of at least 1×
109 samples per second;an ultra-high speed clock for clocking said ADC, said ultra-high speed clock having a clock speed of at least 1 gigahertz; a plurality of switches for coupling said plurality of RF filters with said ADC, said plurality of switches being configured such that a specific RF filter is coupled to said ADC when a specific switch is active to thereby cause a specific frequency band of said amplified signal to be fed to said ADC; wherein said digitized signal from said ADC is transmitted to a processing station by way of an ultra-high speed data link; said receiver system is devoid of down conversion circuitry and of signal mixing circuitry; said ultra-high speed clock is synchronized with other ultra-high speed clocks of other receiving systems using a method comprising; a) deploying each of said ultra-high speed clocks to a single physical location b) simultaneously activating said ultra-high speed clocks using a common trigger to thereby synchronize said ultra-high speed clocks with each other, c) placing each of said ultra-high speed clocks in hibernation and, after synchronizing with each other, d) deploying each of said ultra-high speed clocks to physical locations which are physically remote from one another. - View Dependent Claims (13, 14, 15)
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Specification