Methods and systems for marking data in a flash-based cache as invalid
First Claim
1. A method for a storage device having a flash-based cache, a non-volatile random access memory (NVRAM) and a disk-based storage unit, the method comprising:
- storing, by a controller of the storage device, a first version of data at an address in the flash-based cache;
storing, by the controller, a second version of the data in the disk-based storage unit but not in the flash-based cache, the second version of the data being different than the first version of the data; and
in response to storing the second version of the data in the disk-based storage unit but not in the flash-based cache, storing, by the controller, only the address of the first version of the data in an invalidate buffer instantiated on the NVRAM so as to mark the first version of the data in the flash-based cache as invalid.
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Accused Products
Abstract
A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a time period that justifies its storage in the cache, compressing data prior to its storage in the cache, precluding storage of sequentially-accessed data in the cache, and/or throttling storage of data to the cache within predetermined write periods and/or according to user instruction.
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Citations
12 Claims
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1. A method for a storage device having a flash-based cache, a non-volatile random access memory (NVRAM) and a disk-based storage unit, the method comprising:
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storing, by a controller of the storage device, a first version of data at an address in the flash-based cache; storing, by the controller, a second version of the data in the disk-based storage unit but not in the flash-based cache, the second version of the data being different than the first version of the data; and in response to storing the second version of the data in the disk-based storage unit but not in the flash-based cache, storing, by the controller, only the address of the first version of the data in an invalidate buffer instantiated on the NVRAM so as to mark the first version of the data in the flash-based cache as invalid. - View Dependent Claims (2, 3, 4)
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5. A storage device, comprising a flash-based cache, a disk-based storage unit, a non-volatile random access memory (NVRAM) and a controller, the controller (i) communicatively coupled to the flash-based cache, the disk-based storage unit and the NVRAM;
- and (ii) configured to;
store a first version of data at an address in the flash-based cache; store a second version of the data in the disk-based storage unit but not in the flash-based cache, the second version of the data being different than the first version of the data; and in response to storing the second version of the data in the disk-based storage unit but not in the flash-based cache, store only the address of the first version of the data in an invalidate buffer instantiated on the NVRAM so as to mark the first version of the data in the flash-based cache as invalid. - View Dependent Claims (6, 7, 8)
- and (ii) configured to;
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9. A non-transitory computer-readable storage medium comprising software instructions that, when executed by a controller of a storage device, cause the controller to:
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store a first version of data at an address in a flash-based cache of the storage device; store a second version of the data in a disk-based storage unit of the storage device but not in the flash-based cache, the second version of the data being different than the first version of the data; and in response to storing the second version of the data in the disk-based storage unit but not in the flash-based cache, store only the address of the first version of the data in an invalidate buffer instantiated on a non-volatile random access memory (NVRAM) of the storage device so as to mark the first version of the data in the flash-based cache as invalid. - View Dependent Claims (10, 11, 12)
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Specification