Reducing deterioration in display quality of a displayed image on a display device

• US 9,236,018 B2
• Filed: 02/07/2014
• Issued: 01/12/2016
• Est. Priority Date: 02/08/2013
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Inventors: Nakanishi, Hideyuki, Ooishi, Yoshihisa, Yamazaki, Sachiko
• Primary Examiner(s): Lao, Lun-Yi
• Assistant Examiner(s): Hegarty, Kelly B
• Application Number:
  US14/175,633
• Publication Number:
  US 20140225877A1
• Time in Patent Office: 704 Days
• Field of Search: 345/102, 345/211
• US Class Current: 1/1
• CPC Class Codes: G09G 2310/0213 controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3677 suitable for active matrices only

Abstract

A display device includes a display portion having gate and source signal lines, and a plurality of pixels, a gate driver that outputs gate signals, a source driver that outputs source signals, and a controller that causes the display portion to display an image at a frame frequency. The controller sets the frame frequency to a first frame frequency F1 when the image is a moving picture, and the controller sets the frame frequency to a second frame frequency F2 lower than F1 when the image is a still picture. The gate driver outputs the gate signals to the gate signal lines in an aligned order of gate signal lines in a second direction when the frame frequency is F1, and the gate driver outputs the gate signals to the gate signal lines in different order from the array order when the frame frequency is F2.

Claims

1. A display device comprising:

a display portion including a plurality of gate signal lines extending in a first direction and aligned in a second direction intersecting the first direction, a plurality of source signal lines extending in the second direction and aligned in the first direction, and a plurality of pixels connected to the source signal lines and the gate signal lines, the display portion configured to display an image at a frame frequency for each frame;

a gate driver configured to output gate signals to the gate signal lines sequentially;

a source driver configured to output source signals to the pixels connected to the gate signal lines to which the gate signals are outputted, the source signals configured to display the image through the source signal lines; and

a controller configured to control the gate driver and the source driver to cause the display portion to display the image at the frame frequency for each frame, wherein;

the controller sets the frame frequency to a first frame frequency F1 when the image is a moving picture, and the controller sets the frame frequency to a second frame frequency F2 lower than the first frame frequency F1 when the image is a still picture,

the controller once switches the frame frequency from the first frame frequency F1 to an intermediate frame frequency F3 (F1>

F3>

F2) and then, further switches the frame frequency from the intermediate frame frequency F3 to the second frame frequency F2, when switching the image signal from the moving picture signal to the still picture signal causes the frame frequency to be switched from the first frame frequency F1 to the second frame frequency F2, and

the gate driver outputs the gate signals to the gate signal lines in an aligned order of the gate signal lines in the second direction when the frame frequency is the first frame frequency F1, and the gate driver outputs the gate signals to the gate signal lines in a different order from the aligned order of the gate signal lines when the frame frequency is the second frame frequency F2.

2. The display device according to claim 1, wherein:

the gate signal lines are divided into a plurality of gate groups, each group including K (K is an integer of 2 or more) gate signal lines in the aligned order,

the gate driver repeats a gate selection and output operation K times when the frame frequency is the second frame frequency F2, the gate selection and output operation being an operation of selecting each one of the gate signal lines from the K gate signal lines included in each of the gate groups and outputting the gate signals to the selected gate signal lines sequentially, by which the gate signals are outputted to all the gate signal lines in one frame period, and

the controller controls the source driver in response to the gate selection and output operation to cause the display portion to display the still picture at the second frame frequency F2 for each frame.

3. The display device according to claim 2, wherein the gate driver selects each one of the gate signal lines in the aligned order of the K gate signal lines, when selecting each one of the gate signal lines from the K gate signal lines included in each of the gate groups in the gate selection and output operation.

4. The display device according to claim 2, wherein the gate driver selects each one of the gate signal lines in a different order from the aligned order of the K gate signal lines, when selecting each one of the gate signal lines from the K gate signal lines included in each of the gate groups in the gate selection and output operation.

5. The display device according to claim 4, wherein the gate driver selects half or more than half of the K gate signal lines in the different order from the aligned order, when selecting each one of the gate signal lines from the K gate signal lines included in each of the gate groups in the gate selection and output operation.

6. The display device according to claim 5, wherein:

K is an integer of 4 or more,

the gate driver selects the first gate signal line in the aligned order in the first gate selection and output operation and selects the K-th gate signal line in the aligned order in the K-th gate selection and output operation, and

the gate driver selects the gate signal lines in the different order from the aligned order in the second to (K−

1)th gate selection and output operations, when selecting each one of the gate signal lines from the K gate signal lines included in each of the gate groups in the gate selection and output operation.

7. The display device according to claim 1, wherein:

F2/F1=1/K, and

the controller repeats a first sub image operation at the first frame frequency F1 K times, the first sub image operation being an operation of generating a sub image in each of the gate selection and output operations, and causing the display portion to display the generated sub image, by which the still picture is displayed on the display portion at the second frame frequency F2 for each frame.

8. The display device according to claim 1, wherein:

K is an integer of 3 or more,

the gate signal lines are divided into a plurality of intermediate gate groups, each group including L (L is an integer of 2 or more, and less than K) gate signal lines in the aligned order,

the gate driver repeats an intermediate selection and output operation L times, the intermediate selection and output operation being an operation of selecting each one of the gate signal lines from L gate signal lines included in each of the intermediate gate groups and outputting the gate signals to the selected gate signal lines sequentially, by which the gate signals are outputted to all the gate signal lines in one frame period, when the frame frequency is the intermediate frame frequency F3, and

the controller controls the source driver in response to the intermediate selection and output operation to cause the display portion to display the still picture at the intermediate frame frequency F3 for each frame.

9. The display device according to claim 8, wherein:

F3/F1=1/L, and

the controller repeats a second sub image operation at the first frame frequency F1 L times, the second sub image operation being an operation of generating a sub image in each of the intermediate selection and output operations, and causing the display portion to display the generated sub image, by which the still picture is displayed on the display portion at the intermediate frame frequency F3 for each frame.

10. The display device according to claim 1, further comprising a storage configured to store an image signal, wherein

the controller stores a still picture signal in the storage, and reads the still picture signal stored in the storage to cause the display portion to display the still picture at the second frame frequency F2 for each frame based on the read still picture signal, when an input image signal inputted externally is the still picture signal representing the still picture.

11. The display device according to claim 1, further comprising a backlight portion configured to illuminate the display portion from a back surface of the display portion, wherein:

the controller further controls lighting and extinguishing of the backlight portion,

the pixels of the display portion each include a liquid crystal, and

the controller repeats the lighting and extinguishing of the backlight portion at the same frequency as the first frame frequency F1 regardless of the frame frequency.