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Voltage kick to non-selected word line during programming

  • US 9,236,128 B1
  • Filed: 02/02/2015
  • Issued: 01/12/2016
  • Est. Priority Date: 02/02/2015
  • Status: Active Grant
First Claim
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1. A non-volatile memory circuit, comprising:

  • an array having a plurality of blocks formed according to a NAND type of architecture of a plurality of non-volatile memory cells formed along word lines and connected in series between select gates, each of the blocks having a plurality of sub-blocks, where individual word line portions of the sub-blocks of the same word line of the same block are commonly connected and the select gates of control gates of sub-blocks are connected independently of the select gates of other sub-blocks of the same block;

    driver circuitry connectable to the word lines and the select gates to provide programming voltage levels thereto, wherein the driver circuitry is connectable at a first, but not a second, end of each of the word lines, and wherein at the second end thereof each of the individual word line portions of sub-blocks of the same word line of a block are commonly connected;

    decoding circuitry by which the driver circuitry is connectable to the word lines and the select gates; and

    on-chip control circuitry connected to the driver circuit and decoder circuitry, whereby when performing a programming operation for memory cells on a selected word line for a selected sub-block of a selected block;

    an initial block biasing operation of the selected block is performed in which select gates of non-selected sub-blocks of the selected block are biased to be off and non-selected word lines of the selected block are biased to one of one or more pass voltages, except for a first set of one or more non-selected word lines that are set to a first voltage level, wherein the pass voltages are sufficient to allow a memory cell to conduct independently of a data state written thereto and wherein the first voltage will allow a memory cell to conduct for some but not all data states programmable thereto; and

    , with the selected block biased according to the initial block biasing operation, applying a programming pulse to the selected word line and, while applying the programming pulse, raising the voltage level on one or more of the first set of word lines from the first voltage to a pass voltage.

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