Semiconductor transistor device and method for manufacturing same

• US 9,236,468 B2
• Filed: 12/26/2013
• Issued: 01/12/2016
• Est. Priority Date: 03/25/2011
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yasuhara, Norio, Suzuki, Miwako
• Primary Examiner(s): Diallo, Mamadou
• Assistant Examiner(s): SYLVIA, CHRISTINA A
• Application Number:
  US14/141,279
• Publication Number:
  US 20140103427A1
• Time in Patent Office: 747 Days
• Field of Search: 257/330, 257/E29.066, 257/328
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

According to one embodiment, a semiconductor device includes a drift layer. The device includes a base layer. The device includes a source layer selectively provided on a surface of the base layer. The device includes a gate electrode provided via a gate insulating film in a trench penetrating the source layer and the base layer to reach the drift layer. The device includes a field plate electrode provided under the gate electrode in the trench. The device includes a drain electrode electrically connected to the drift layer. The device includes a source electrode. The field plate electrode is electrically connected to the source electrode. An impurity concentration of a first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer. And the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×10¹⁶ (atoms/cm³).

Claims

1. A semiconductor device comprising:

a drift layer of a first conductivity type;

a base layer of a second conductivity type provided on the drift layer;

a source layer of the first conductivity type selectively provided on a surface of the base layer;

a gate electrode contacting the source layer, the base layer, and the drift layer via a gate insulating;

a semiconductor layer of the second conductivity type connected to the base layer and extending into the drift layer;

a drain electrode electrically connected to the drift layer; and

a source electrode electrically connected to the source layer, wherein;

an impurity concentration of the first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the drift layer;

the impurity concentration of the first conductivity type contained in the base layer is lower than an impurity concentration of the first conductivity type contained in the semiconductor layer; and

the impurity concentration of the first conductivity type contained in the drift layer is not less than 1×

10¹⁶ (atoms/cm³),

an impurity concentration profile through the drift layer and the semiconductor layer along a first direction from the drain electrode toward the source electrode has a first portion in which impurity concentration of the first conductivity type is constant and not less than 1×

10¹⁶ (atoms/cm³) and a second portion in which impurity concentration of the first conductivity type is decreasing along the first direction from the drain electrode toward the source electrode and less than 1×

10¹⁶ (atoms/cm³),

the first portion is between the second portion and the drain electrode along the first direction, and

the first portion extends for a first distance along the first direction and the second portion extends for a second distance along the first direction that is less than the first distance.

2. The device according to claim 1, wherein:

a contact layer of the second conductivity type is selectively provided on the surface of the base layer so as to be adjacent to the source layer;

an impurity concentration of the second conductivity type contained in the contact layer is higher than a value obtained by subtracting the impurity concentration of the first conductivity type contained in the base layer from an impurity concentration of the second conductivity type contained in the base layer; and

the contact layer is connected to the source electrode.

3. The device according to claim 1, wherein the drift layer and the semiconductor layer are arranged alternately to form a super junction structure.

4. The device according to claim 1, wherein the first conductivity type is n type and the second conductivity type is p type, or the first conductivity type is p type and the second conductivity type is n type.

5. The device according to claim 2, wherein the contact layer is aligned with the semiconductor layer along a direction orthogonal to a layer plane of the base layer.

6. The device according to claim 1, wherein the gate electrode has a trench gate type structure.