Stochastic block allocation for improved wear leveling

• US 9,239,785 B2
• Filed: 06/09/2014
• Issued: 01/19/2016
• Est. Priority Date: 04/14/2011
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Post, Daniel J., Wakrat, Nir J.
• Primary Examiner(s): Verbrugge, Kevin
• Assistant Examiner(s): Perez-Velez, Rocio Del Mar
• Application Number:
  US14/299,516
• Publication Number:
  US 20140281179A1
• Time in Patent Office: 589 Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 7/588 Random number generators, i.e. based on natural stochastic processes
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory (“NVM”). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select a set of blocks or super blocks based on a pre-determined threshold of a number of cycles (e.g., erase cycles and/or write cycles). The block or super block can then be selected from the set of super blocks. In other embodiments, the system can use a fully stochastic approach by selecting a block or super block based on a biased random variable. The biased random variable may be generated based in part on the number of cycles associated with each block or super block of the NVM.

Claims

1. A method for super block allocation of a plurality of super blocks of a non-volatile memory (“

NVM”

), said NVM including multiple integrated circuits each having multiple blocks, for wear leveling, the method comprising;

selecting, at a first time period, a set of super blocks, each super block comprising a plurality of blocks from corresponding integrated circuits, from the plurality of super blocks that satisfy a pre-determined threshold of a total distribution of the number of cycles of the plurality of super blocks;

allocating, at a second time period, a super block of the set of super blocks for wear leveling, wherein the super block is stochastically selected from the set of super blocks, wherein the stochastic selection of the super block is a non-deterministic selection, and wherein the second time period occurs after the first time period; and

performing wear leveling on the NVM using the allocated super block.

2. The method of claim 1, wherein the plurality of super blocks comprises the free super blocks of the NVM.

3. The method of claim 1, wherein the number of cycles is at least one of a number of erase cycles or a number of write cycles.

4. The method of claim 1, wherein the determining the set of super blocks further comprises:

determining that a lower-cycled super block needs to be allocated for wear leveling; and

selecting the set of super blocks, wherein each super block of the set of super blocks has a number of cycles that is one of lower than or equal to the predetermined threshold.

5. The method of claim 4, wherein at least one super block of the set of super blocks is a lowest-cycled super block.

6. The method of claim 4, wherein each super block of the set of super blocks has a number of cycles that is in a pre-determined percentile of the total distribution of the number of cycles of the plurality of super blocks, wherein the pre-determined percentile is selected based on at least one statistical parameter of the total distribution.

7. The method of claim 1, wherein the determining the set of super blocks further comprises:

determining that a higher-cycled super block needs to be allocated for wear leveling; and

selecting the set of super blocks, wherein each super block of the set of super blocks has a number of cycles that is one of greater than or equal to the pre-determined threshold.

8. The method of claim 7, wherein one super block of the set of super blocks is a highest-cycled super block.

9. The method of claim 7, wherein each super block of the set of super blocks has a number of cycles that is in a pre-determined percentile of the total distribution of the number of cycles of the plurality of super blocks, wherein the pre-determined percentile is selected based on at least one statistical parameter of the total distribution.

10. The method of claim 1, wherein the allocating further comprises allocating the super block of the set of super blocks based on at least one statistical parameter.

11. The method of claim 1, wherein the at least one statistical parameter is at least one of the mean of the total distribution of the number of cycles of the plurality of super blocks and the median of the total distribution of the number of cycles of the plurality of super blocks.

12. The method of claim 1, wherein the allocating the super block further comprises allocating a random super block from the set of super blocks.

13. A system comprising:

a non-volatile memory (“

NVM”

), said NVM including multiple integrated circuits each having multiple blocks, comprising a plurality of super blocks, each super block comprising a plurality of blocks from corresponding integrated circuits;

a bus controller operative to communicate with the NVM; and

control circuitry operative to;

determine whether a lower-cycled block needs to be allocated for wear leveling;

in response to determining that a lower-cycled super block needs to be allocated for wear leveling, select, at a first time period, a set of super blocks, wherein each super block of the set of super blocks has a number of cycles that is within a pre-determined range of the number of cycles of a lowest-cycled block of the plurality of super blocks; and

allocate, at a second time period, a super block of the set of super blocks for wear leveling, wherein the super block is stochastically selected from the set of super blocks wherein the stochastic selection of the super block is a non-deterministic selection, and wherein the second time period occurs after the first time period.

14. The system of claim 13, wherein the number of cycles is at least one of a number of erase cycles or a number of write cycles.

15. The system of claim 13, wherein the set of super blocks comprises free super blocks.

16. The system of claim 13, wherein the control circuitry is operative to direct the bus controller to perform wear leveling on the NVM using the allocated super block.

17. The system of claim 13, wherein the predetermined range has a lower end equal to the number of cycles of the lowest-cycled block, and an upper end equal to a pre-determined percentile of a total distribution of a number of cycles of the plurality of super blocks.

18. The system of claim 13, wherein in response to determining that a higher-cycled block needs to be allocated for wear leveling, the control circuitry is operative to:

select a set of super blocks, wherein each super block of the set of super blocks has a number of cycles that is within a pre-determined range of the number of cycles of a highest-cycled block of the plurality of super blocks; and

allocate a super block of the set of super blocks for wear leveling.

19. The system of claim 18, wherein the predetermined range has a lower end equal to a predetermined percentile of a total distribution of a number of cycles of the plurality of super blocks, and an upper end equal to the number of cycles of the highest-cycled super block.