Receiver, apparatus, and methods for wirelessly receiving data from a power infrastructure

• US 9,240,823 B2
• Filed: 06/23/2015
• Issued: 01/19/2016
• Est. Priority Date: 09/11/2012
• Status: Expired due to Fees

• Current Assignee: University of Washington
• Original Assignee: University of Washington
• Inventors: Patel, Shwetak N., Cohn, Gabriel A., Reynolds, Matthew S.
• Primary Examiner(s): Torres, Juan A
• Application Number:
  US14/747,963
• Publication Number:
  US 20150326280A1
• Time in Patent Office: 210 Days
• Field of Search: 375/257
• US Class Current: 1/1
• CPC Class Codes: G08B 25/06 using power transmission lines
• CPC Class Codes: G08B 29/02 Monitoring continuously signalling or alarm systems
• CPC Class Codes: H04B 2203/5408 using protocols
• CPC Class Codes: H04B 2203/5441 Wireless systems or telephone
• CPC Class Codes: H04B 2203/5445 Local network
• CPC Class Codes: H04B 3/542 the information being in digital form
• CPC Class Codes: H04L 27/14 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04W 24/08 Testing, supervising or monitoring using real traffic

Abstract

Apparatuses, receivers, systems and methods for receiving data via a power line infrastructure. An exemplary apparatus includes a base station configured to receive a signal from a power line of a structure by coupling to the power line through an electrical outlet. The base station may include an impedance matching circuit configured to match an impedance of the power line of the structure, and a receiver coupled to the impedance matching circuit. The receiver may be configured to demodulate the signal received from the power line of the structure, convert the demodulated signal into a digital signal, and provide the digital signal to a decoder.

Claims

1. A non-transitory computer readable medium comprising instructions that, when executed by one or more processing units, cause the one or more processing units to:

receive a first signal and a second signal via a receiver coupled to a power line of a structure;

detect a transition of the first signal to a first value at a first time;

detect a start of header sequence of the second signal at a second time, wherein a time between the first time and the second time is a predetermined length of time;

receive a data sequence of the second signal after the header sequence; and

responsive to determining that the header sequence is a valid sequence, decoding the data sequence based on an encoding scheme.

2. The non-transitory computer readable medium of claim 1, further comprising instructions that, when executed by one or more processing units, cause the one or more processing units to determine a single bit length based on the header sequence.

3. The non-transitory computer readable medium of claim 1, further comprising instructions that, when executed by one or more processing units, cause the one or more processing units to decode the data sequence based on a bit sequence using a state machine.

4. The non-transitory computer readable medium of claim 1, wherein the first signal comprises a receive signal strength indicator (RSSI) signal and the second signal is a frequency discriminator signal.

5. The non-transitory computer readable medium of claim 1, further comprising instructions that, when executed by one or more processing units, cause the one or more processing units to convert the data sequence to a list of pulse widths.

6. The non-transitory computer readable medium of claim 1, further comprising instructions that, when executed by one or more processing units, cause the one or more processing units to decode the data sequence based on a run-length limited encoding scheme, a block code coding scheme, or a convolutional coding scheme.

7. An apparatus, comprising:

a base station configured to receive signals from a power line of a structure by coupling to the power line through an electrical outlet, the base station including a receiver configured to receive a signal strength indicator (RSSI) signal and a data output signal, wherein the receiver is further configured to detect a transition of the RSSI signal to a value greater than a threshold value at a first time, the receiver further configured to detect a header sequence of the data output signal at a second time that is different than the first time, the receiver further configured to receive a data sequence of the data output signal after the header sequence, and wherein the receiver is further configured to decode the data sequence based on an encoding scheme.

8. The apparatus of claim 7, wherein a time between the first time and the second time is a predetermined length of time.

9. The apparatus of claim 7, wherein the receiver is further configured to determine a length of the data sequence based on a time between an end of the header sequence and the RSSI signal dropping below the threshold.

10. The apparatus of claim 7, wherein the receiver is further configured to determine wherein the header sequence is a valid header sequence based on correlation between the header sequence and a predetermined template.

11. The apparatus of claim 7 wherein the encoding scheme is a block code, a run length limited code, or a convolutional code.

12. The apparatus of claim 10, wherein the valid header sequence includes a sequence of bits sent using a frequency shift keying (FSK) modulation.

13. The apparatus of claim 10, wherein the valid header sequence includes a Barker code sequence.

14. A method, comprising:

receiving a first signal and a second signal via a power line of a structure, wherein the first signal and the second signal are each wirelessly coupled to the power line;

determining a time when the first signal a transitions to a value greater than a threshold value;

determining a time when a header sequence of the second signal begins after the time when the first signal transitions to the value greater than the threshold;

receiving a data sequence of the second signal following the header sequence; and

decoding the data sequence based on an encoding scheme.

15. The method of claim 14, wherein the data sequence is decoded responsive to the header sequence being a valid sequence.

16. The method of claim 14, further comprising:

determining whether a time difference between the time when the first signal transitions to a value greater than a threshold value and the time when the header sequence of the second signal begins is approximately a predetermined time; and

responsive to the determination that the time difference is approximately the predetermined time, determining the data sequence is part of a valid packet.

17. The method of claim 14, wherein the encoding scheme is a convolutional encoding scheme, a block code encoding scheme, or a run-length limited encoding scheme.

18. The method of claim 14, further comprising determining a length of a packet that includes the data sequence based on a time between the end of the header sequence of the second signal and a value of the first signal transitioning below the threshold value.

19. The method of claim 15, further comprising determining whether the header sequence is the valid sequence.

20. The method of claim 18, wherein determining whether the length of the packet is equal to an expected length.