Radio frequency signal router

• US 9,240,958 B2
• Filed: 04/16/2012
• Issued: 01/19/2016
• Est. Priority Date: 04/16/2012
• Status: Active Grant

• Current Assignee: Evertz Microsystems Ltd. (Evertz Technologies Limited)
• Original Assignee: Evertz Microsystems Ltd. (Evertz Technologies Limited)
• Inventors: Baldor, Daniel
• Primary Examiner(s): Kizou, Hassan
• Assistant Examiner(s): MUSA, ABDELNABI O
• Application Number:
  US13/447,817
• Publication Number:
  US 20130271236A1
• Time in Patent Office: 1,373 Days
• Field of Search: 370/328, 370/329, 370/330
• US Class Current: 1/1
• CPC Class Codes: H04L 45/60 Router architectures
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/1515 Non-blocking multistage, e.g. Clos
• CPC Class Codes: H04L 49/1523 Parallel switch fabric planes
• CPC Class Codes: H04L 49/552 by ensuring the integrity of packets received through redundant connections

Abstract

A RF router for routing n input signals to m destinations, where the router comprises a backplane coupled to a plurality of RF input terminals, a plurality of RF output terminals, a plurality of splitters and a plurality of connectors. The backplane is also coupled to a controller and a plurality of connectors for receiving a plurality of switching matrices. The RF router comprises a plurality of u×v input switch matrices, a plurality of p×q intermediate switch matrices and a plurality of r×s output switch matrices, where at least one of the plurality of u×v input switch matrices, the plurality of p×q intermediate switch matrices and the plurality of r×s output switch matrices are redundant.

Claims

1. A RF router comprising:

a controller;

an input stage comprising a plurality of RF input terminals, wherein each RF input terminal is configured to receive an input RF signal, and wherein each input stage further comprises;

a plurality of u×

v input switch matrices;

each of the plurality of u×

v input switch matrices having u inputs and v outputs; and

a plurality of splitters, wherein each splitter is connected to an RF input terminal for coupling a corresponding input RF signal to at least one u×

v input switch matrix;

a plurality of p×

q intermediate switch matrices, each of the plurality of p×

q intermediate switch matrices having p inputs and q outputs, wherein inputs of each p×

q intermediate switch matrices are coupled to outputs of the u×

v input switch matrices such that each input of each p×

q intermediate switch matrix is coupled to exactly one output of the plurality of u×

v input switch matrices;

an output stage comprising;

a plurality of r×

s output switch matrices, each of the plurality of r×

s output switch matrices having r inputs and s outputs, wherein inputs of each r×

s output switch matrix are coupled to outputs of the p×

q intermediate switch matrices such that each input of each r×

s output switch matrix is coupled to exactly one output of each p×

q intermediate switch matrix; and

a plurality of combiners coupled between the plurality of r×

s output switch matrices and a plurality of RF output terminals, wherein at least one combiner is configured to couple different r×

s output switch matrices to one of the plurality of RF output terminals, and wherein each RF output terminal is configured to provide an output RF signal; and

wherein at least one of the plurality of u×

v input switch matrices, at least one of the plurality of p×

q intermediate switch matrices, and at least one of the plurality of r×

s output switch matrices are redundant.

2. The RF router of claim 1, wherein the inputs of each p×

q intermediate switch matrix are coupled to different u×

v input switch matrices.

3. The RF router of claim 1, wherein the inputs of each r×

s output switch matrix are coupled to different p×

q intermediate switch matrices.

4. The RF router of claim 1, wherein each splitter is configured to couple the corresponding input RF signal to different u×

v input switch matrices.

5. The RF router of claim 1, wherein the RF router has at least 64 RF input terminals.

6. The RF router of claim 5, wherein the RF router has at least 64 RF output terminals.

7. The RF router of claim 6, wherein when the RF router has 64 RFinput terminals and 64 RF output terminals, the RF router comprises 16 u×

v input switch matrices, 16 p×

q intermediate switch matrices and 16 r×

s output switch matrices, wherein the plurality of u×

v input switch matrices, the plurality of p×

q intermediate switch matrices and the plurality of r×

s output switch matrices are 8×

8 switch matrices.

8. The RF router of claim 6, wherein when the RF router has 64 RF input terminal and 128 RF output terminals, the RF router comprises 16 u×

v input switch matrices, 16 p×

q intermediate switch matrices and 32 r×

s output switch matrices, wherein the plurality of u×

v input switch matrices and the plurality of r×

s output switch matrices are 8×

8 switch matrices, and the plurality of p×

q intermediate switch matrices are 8×

16 switch matrices.

9. The RF router of claim 5, wherein when the RF router has 128 RF input terminals and 128 RF output terminals, the RF router comprises 32 u×

v input switch matrices, 16 p×

q intermediate switch matrices and 32 r×

s output switch matrices, wherein the plurality of u×

v input switch matrices and the plurality of r×

s output switch matrices are 8×

8 switch matrices, and the plurality of p×

q intermediate switch matrices are 16×

16 switch matrices.

10. The RF router of claim 1, wherein each splitter is a passive splitter and each combiner is a passive combiner.

11. The RF router of claim 1, wherein each RF input terminal has an external signal impedance and wherein the RF router has an internal signal impedance, and wherein the input stage further comprises an impedance matching stage coupled between each RF input terminal and the corresponding splitter, wherein the impedance matching stage the external signal impedance to the corresponding RF input terminal and the internal signal impedance to the corresponding splitter.

12. The RF router of claim 1, wherein at least some r×

s output switch matrices comprise an automatic gain control stage, wherein each automatic gain control stage operates to adjust the gain of an incoming RF signal.

13. The RF router of claim 12, wherein at least some r×

s output switch matrices comprise an equalization stage coupled to the automatic gain control stage, wherein each of the equalization stage is configurable to equalize the incoming RF signal.

14. The RF router of claim 1, wherein at least some of the u×

v input switch matrix comprise an equalization stage to equalize the input RF signal.

15. The RF router of claim 1, wherein at least some p×

q intermediate switch matrices comprise an equalization stage for equalizing an incoming RF signal.

16. The RF router of claim 1, wherein the controller is configured to insert a unique tone signal to each of the split input signal corresponding to each input RF signal.

17. The RF router of claim 16, wherein the controller is configured to monitor the unique tone signal in at least one u×

v input switch matrix, at least one p×

q intermediate switch matrix, and at least one r×

s output switch matrix.

18. The RF router of claim 1, wherein the RF router further comprises a backplane and a plurality of connection ports coupled to the backplane, wherein the connection ports are configured to receive the plurality of u×

v input switch matrices, the plurality of p×

q intermediate switch matrices, and the plurality of r×

s output switch matrices, and wherein each connection port comprises opposing pins that close to provide an impedance when the connection port is not connected to at least one of the plurality of u×

v input switch matrices, the plurality of p×

q intermediate switch matrices, and the plurality of r×

s output switch matrices.

19. The RF router of claim 18, wherein the controller is configured to detect removal of a switch matrix from a corresponding connection port, wherein the switch matrix is selected from the group consisting of at least one u×

v input switch matrix, at least one p×

q intermediate switch matrix, and at least one r×

s output switch matrix.

20. The RF router of claim 19, wherein at least one of the u×

v input switch matrix, the p×

q intermediate switch matrix, and the r×

s output switch matrix comprises an ejector assembly and wherein the controller is configured to detect whether the ejector assembly is in an open state or a closed state to detect removal of at least one of the u×

v input switch matrix, the p×

q intermediate switch matrix, and the r×

s output switch matrix from the corresponding connection port.

21. The RF router of claim 20, wherein at least one of the u×

v input switch matrix, the p×

q intermediate switch matrix, and the r×

s output switch matrix comprises a capacitive sensor.

22. The RF router of claim 18, wherein the controller is configured to detect insertion of a switch matrix to a corresponding connection port, wherein the switch matrix is selected from the group consisting of at least one u×

v input switch matrix, at least one p×

q intermediate switch matrix, and at least one r×

s output switch matrix.

23. The RF router of claim 1, wherein the RF input terminals and the RF output terminals comprise a BNC connector.

24. The RF router of claim 1, wherein distances between each splitter and each u×

v input switch matrix, each u ×

v input switch matrix and each p×

q intermediate switch matrix, each p×

q intermediate switch matrix and each r×

s output switch matrix, and each r×

s output switch matrix and each combiner are equal.