Flash memory organization for reduced failure rate
First Claim
Patent Images
1. A memory system comprising:
- a DRAM memory comprising a DRAM data word;
a flash memory comprising flash memory pages;
machine memory or circuits comprising logic to distribute across multiple of the flash memory pages different bits of the DRAM data word, the DRAM data word having a number of DRAM data word bits equal to a DRAM row width; and
machine memory or circuits comprising logic to carry out distribution of the different bits of the DRAM data word across the flash memory pages in a sequence of swatches of bits, each swatch of the sequence of swatches having a number of bits equal to a product of the DRAM row width and a page size of the flash memory, and to change a power state of one or more DRAM devices of the DRAM memory system between distribution of the each swatch of the sequence of swatches across the flash memory pages.
1 Assignment
0 Petitions
Accused Products
Abstract
A memory system distributes across multiple pages of a flash memory bits of a DRAM data word, the data word having a number of bits equal to a width of a row of a DRAM memory, and the bits of the data word all from a same row of the DRAM memory.
-
Citations
14 Claims
-
1. A memory system comprising:
-
a DRAM memory comprising a DRAM data word; a flash memory comprising flash memory pages; machine memory or circuits comprising logic to distribute across multiple of the flash memory pages different bits of the DRAM data word, the DRAM data word having a number of DRAM data word bits equal to a DRAM row width; and machine memory or circuits comprising logic to carry out distribution of the different bits of the DRAM data word across the flash memory pages in a sequence of swatches of bits, each swatch of the sequence of swatches having a number of bits equal to a product of the DRAM row width and a page size of the flash memory, and to change a power state of one or more DRAM devices of the DRAM memory system between distribution of the each swatch of the sequence of swatches across the flash memory pages. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method comprising:
-
storing in a DRAM memory a DRAM data word; distributing across multiple flash memory pages different bits of the DRAM data word, the DRAM data word having a number of DRAM data word bits equal to a DRAM row width; and distributing the different bits of the DRAM data word across the flash memory pages in a sequence of swatches of bits, each swatch of the sequence of swatches having a number of bits equal to a product of the DRAM row width and a page size of the flash memory, and to change a power state of one or more DRAM devices of the DRAM memory system between distribution of the each swatch of the sequence of swatches across the flash memory pages. - View Dependent Claims (9, 10, 11, 12, 13, 14)
-
Specification