Voice coil motor temperature sensing circuit to reduce catastrophic failure due to voice coil motor coil shorting to ground

• US 9,245,540 B1
• Filed: 10/29/2014
• Issued: 01/26/2016
• Est. Priority Date: 10/29/2014
• Status: Active Grant

• Current Assignee: JP Morgan Chase Bank, N.A. (JP Morgan Chase & Co)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: Agness, John R., Laird, William K.
• Primary Examiner(s): Young, Wayne
• Assistant Examiner(s): Habermehl, James L
• Application Number:
  US14/526,618
• Time in Patent Office: 454 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G05F 1/463 Sources providing an output which depends on temperature
• CPC Class Codes: G11B 19/046 Detection or prevention or problems due to temperature
• CPC Class Codes: G11B 5/022 H-Bridge head driver circuit, the "H" configuration allowing to inverse the current direction in the head
• CPC Class Codes: G11B 5/40 Protective measures on heads, e.g. against excessive temperature G11B5/31 takes precedence; protection against wear G11B5/255 ; protective structure of the head: see under structures, e.g. G11B5/3106
• CPC Class Codes: G11B 5/5565 system adaptation for compensation of variations of physical parameters, e.g. temperature
• CPC Class Codes: H02H 3/085 making use of a thermal sensor, e.g. thermistor, heated by the excess current also responsive to the temperature of the protected device H02H5/041, thermal images H02H6/00
• CPC Class Codes: H02H 5/048 additionally responsive to excess current due to heating of the switch

Abstract

An electrical circuit includes: a controlled switch; one or more temperature sensors in thermal contact with the controlled switch; and a control unit configured to: receive a temperature signal from the one or more temperature sensors; compare the received temperature signal to a predetermined threshold; and in response to the received temperature signal exceeding the predetermined threshold, render the controlled switch inoperative.

Claims

1. An electrical circuit, comprising:

a plurality of controlled switches, each of the plurality of controlled switches having one or more temperature sensors in thermal contact with each of the plurality of controlled switches, and

a control unit configured to;

receive temperature signals from the one or more temperature sensors;

compare the received temperature signals of each of the plurality of controlled switches to the received temperature signals of every other one of the plurality of controlled switches;

in response to a variation in the received temperature signals of any of the plurality of controlled switches greater than a predetermined amount compared to the received temperature signals of any other one of the plurality of controlled switches, render the plurality of controlled switches inoperative; and

in response to the variation in the received temperature signal exceeding the predetermined amount, record an over-temperature event.

2. The electrical circuit of claim 1, wherein the predetermined amount of variation in the received temperature signals is variable based on operating conditions of the electrical circuit.

3. The electrical circuit of claim 1, wherein the control unit is further configured to cause the electrical circuit to initiate one or more predetermined operations prior to rendering the controlled switch inoperative.

4. The electrical circuit of claim 1, wherein the temperature sensors are diode temperature sensors.

5. The electrical circuit of claim 4, wherein the diode temperature sensors are formed on a semiconductor die at opposite corners of a controlled switch structure formed on the semiconductor die.

6. The electrical circuit of claim 1, wherein the control unit is further configured to render the plurality of controlled switches inoperative by commanding the plurality of controlled switches a to a high impedance state.

7. The electrical circuit of claim 1, wherein the rendering the plurality of controlled switches inoperative comprises configuring the plurality of controlled switches so as not to permit electrical current flow through controlled terminals of the plurality of controlled switches.

8. The electrical circuit of claim 1, wherein the controlled switches are field effect transistors (FETs).

9. An electrical circuit, comprising:

a plurality of field effect transistors (FETs) configured as an H-bridge circuit;

one or more temperature sensors integrated with each of the plurality of FETs; and

a control unit configured to;

receive temperature signals from the one or more temperature sensors;

compare the received temperature signals from the one or more temperature sensors of each of the plurality of FETs to the received temperature signals from the one or more temperature sensors of every other one of the plurality of FETs;

in response to a variation in the received temperature signals from the one or more temperature sensors of any one of the plurality of FETs greater than a predetermined amount compared to the received temperature signals from the one or more temperature sensors of any other one of the plurality of FETs, render the plurality of FETs inoperative; and

in response to the variation in the received temperature signals exceeding the predetermined amount, record an over-temperature event.

10. The electrical circuit of claim 9, wherein the predetermined amount of variation in the received temperature signals is variable based on operating conditions of the electrical circuit.

11. The electrical circuit of claim 9, wherein the control unit is further configured to cause the electrical circuit to initiate one or more predetermined operations prior to rendering the plurality of FETs inoperative.

12. The electrical circuit of claim 9, wherein the one or more temperature sensors are diode temperature sensors.

13. The electrical circuit of claim 12, wherein the diode temperature sensors are formed on a semiconductor die at opposite corners of a FET structure formed on the semiconductor die.

14. The electrical circuit of claim 9, wherein the rendering the plurality of FETs inoperative comprises commanding the plurality of FETs to a high impedance state.

15. The electrical circuit of claim 9, wherein the rendering the plurality FETs inoperative comprises preventing current flow from a drain terminal to a source terminal of each of the plurality of FETs.

16. A method for sensing an overcurrent condition in an electrical circuit, the method comprising:

monitoring temperature of one or more circuit elements;

comparing the monitored temperature of each of the one or more circuit elements to the monitored temperature of every other one of the one or more circuit elements;

in response to a variation in the monitored temperature of any of the one or more circuit elements greater than a predetermined amount compared to the monitored temperature of any other one of the one or more circuit elements, rendering the one or more circuit elements inoperative, and

in response to the variation in the monitored temperature of any of the one or more circuit elements exceeding the predetermined amount, recording an over-temperature event.

17. The method of claim 16, wherein the predetermined amount of variation in the monitored temperature is variable based on operating conditions of the electrical circuit.

18. The method of claim 16, further comprising, prior to rendering the one or more circuit elements inoperative, causing the electrical circuit to initiate one or more predetermined operations.

19. The method of claim 16, wherein the rendering the one or more circuit elements inoperative comprises configuring the electrical circuit so as not to permit electrical current flow through the one or more circuit elements.

20. A data storage device (DSD), comprising:

an electrical circuit, comprising;

a plurality of field effect transistors (FETs) configured as an H-bridge circuit;

one or more temperature sensors integrated with each of the plurality of FETs; and

a control unit configured to;

receive temperature signals from the one or more temperature sensors;

compare the received temperature signals from the one or more temperature sensors of each of the plurality of FETs to received temperature signals from the one or more temperature sensors of every other one of the plurality of FETs;

in response to a variation in the received temperature signals from the one or more temperature sensors of any one of the plurality of FETs greater than a predetermined amount compared to the received temperature signals from the one or more temperature sensors of any other one of the plurality of FETs, render the plurality of FETs inoperative; and

in response to the variation in the received temperature signals exceeding the predetermined amount, record an over-temperature event.

21. The DSD of claim 20, wherein the predetermined amount of variation in the received temperature signals is variable based on operating conditions of the electrical circuit.

22. The DSD of claim 20, wherein the control unit is further configured to cause the electrical circuit to initiate one or more predetermined operations prior to rendering the plurality of FETs inoperative.

23. The DSD of claim 22, wherein at least one of the predetermined operations is an emergency power-off retract of a read-write head actuator arm.

24. The DSD of claim 20, wherein the one or more temperature sensors are diode temperature sensors.

25. The DSD of claim 24, wherein the diode temperature sensors are formed on a semiconductor die at opposite corners of a FET structure formed on the semiconductor die.

26. The DSD of claim 20, wherein the rendering the plurality of FETs inoperative comprises commanding the plurality of FETs to a high impedance state.

27. The DSD of claim 20, wherein the rendering the plurality FETs inoperative comprises preventing current flow from a drain terminal to a source terminal of each of the plurality of FETs.