Organic module EMI shielding structures and methods

• US 9,245,854 B2
• Filed: 10/16/2014
• Issued: 01/26/2016
• Est. Priority Date: 01/29/2013
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Brodsky, William L., Budell, Timothy W., Connor, Samuel R., Lamorey, Mark Curtis Hayes, Patel, Janak G., Slota, Peter Jr., Stone, David B.
• Primary Examiner(s): Nguyen, Cuong Q
• Assistant Examiner(s): Yasmeen, Nishath
• Application Number:
  US14/515,597
• Publication Number:
  US 20150033554A1
• Time in Patent Office: 467 Days
• Field of Search: 257/659, 257/660
• US Class Current: 1/1
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 23/295 containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 2924/014 Solder alloys
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16172 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2924/16178 with a principal constituent of the material being a solid not provided for in groups H01L2924/157 - H01L2924/15791, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
• CPC Class Codes: H01L 2924/16179 with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
• CPC Class Codes: H01L 2924/167 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2924/1676 Iron [Fe] as principal constituent
• CPC Class Codes: H01L 2924/16793 with a principal constituent of the material being a solid not provided for in groups H01L2924/167 - H01L2924/16791, e.g. allotropes of carbon, fullerene, graphite, carbon-nanotubes, diamond
• CPC Class Codes: H01L 2924/16798 with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: H05K 9/0081 : Electromagnetic shielding materials, e.g. EMI, RFI shielding H05K9/0003 takes precedence
• CPC Class Codes: Y10T 29/49128 : Assembling formed circuit to base

Abstract

Apparatus and methods for an electronic package incorporating shielding against emissions of electromagnetic interference (EMI). According to an integrated circuit structure, a substrate is on a printed circuit board. An integrated circuit chip is on the substrate. The integrated circuit chip is electrically connected to the substrate. An EMI shielding unit is on the integrated circuit chip and the substrate. The EMI shielding unit comprises a lid covering the integrated circuit chip and portions of the substrate outside the integrated circuit chip. A fill material can be deposited within a cavity formed between the lid and the substrate. The fill material comprises an EMI absorbing material. A periphery of the lid comprises a side skirt, the side skirt circumscribing the integrated circuit chip and the substrate. EMI absorbing material is on the printed circuit board, and a portion of the side skirt is embedded in the EMI absorbing material.

Claims

1. A method, comprising:

connecting an integrated circuit chip to a first surface of a substrate, said substrate having a second surface opposite said first surface and electromagnetic interference (EMI) absorbing material directly contacting at least a portion of at least one of said first surface and said second surface;

electrically connecting said integrated circuit chip to said substrate;

connecting said second surface of said substrate to a printed circuit board; and

connecting a lid to said integrated circuit chip, said first surface of said substrate, and said printed circuit board, a periphery of said lid comprising a side skirt, said side skirt circumscribing said integrated circuit chip and said substrate, said connecting of said lid comprising;

depositing a portion of EMI absorbing material on said printed circuit board so as to circumscribe said substrate; and

embedding a portion of said side skirt in said portion of EMI absorbing material.

2. The method according to claim 1, further comprising:

coating on an inner surface of said side skirt and at least a portion of said lid with an EMI absorbing coating.

3. The method according to claim 1, further comprising:

connecting a surface ground trap to said printed circuit board.

4. The method according to claim 3, said surface ground trap being located in line with said side skirt.

5. The method according to claim 3, further comprising:

connecting an EMI radiation absorbing wall to a top surface of said surface ground trap, said EMI radiation absorbing wall being positioned laterally adjacent to, but physically separated from, said side skirt.

6. The method according to claim 1, further comprising:

depositing a fill material within a cavity formed between said lid and said substrate, said fill material comprising an EMI absorbing material.

7. A method, comprising:

providing a substrate on a printed circuit board, said substrate having a first surface and a second surface and electromagnetic interference (EMI) absorbing material directly contacting at least a portion of at least one of said first surface and said second surface of said substrate;

mounting an integrated circuit chip on said substrate;

electrically connecting said integrated circuit chip to said substrate; and

covering said integrated circuit chip and said substrate with an EMI shielding unit, said EMI shielding unit comprising;

a lid covering said integrated circuit chip and portions of said substrate outside said integrated circuit chip;

a periphery of said lid comprising a side skirt, said side skirt circumscribing said integrated circuit chip and said substrate; and

EMI absorbing material attached to an inner surface of said side skirt and at least a portion of an inner surface of said lid; and

,

attaching a portion of EMI absorbing material to said printed circuit board; and

embedding a portion of said side skirt in said portion of EMI absorbing material.

8. The method according to claim 7, said EMI absorbing material directly contacting said at least a portion of said at least one of said first surface and said second surface of said substrate comprising a solder mask.

9. The method according to claim 7, further comprising:

attaching a surface ground trap to a mounting surface of said printed circuit board.

10. The method according to claim 9, said surface ground trap being located in line with said side skirt.

11. The method according to claim 9, further comprising:

connecting an EMI radiation absorbing wall to said surface ground trap, said EMI radiation absorbing wall being positioned adjacent to said side skirt.

12. The method according to claim 7, further comprising:

depositing a fill material within a cavity formed between said lid and said substrate, said fill material comprising an EMI absorbing material.

13. A method of building an electronics package, said method comprising:

providing a substrate having a first surface and a second surface opposite said first surface;

connecting an integrated circuit chip to said first surface of said substrate;

attaching a plurality of electrically conductive circuit members to said first surface of said substrate and electrically connecting said electrically conductive circuit members to said integrated circuit chip;

providing a printed circuit board having a mounting surface;

connecting said second surface of said substrate to said mounting surface of said printed circuit board; and

covering said integrated circuit chip and portions of said substrate outside said integrated circuit chip with a lid, said lid comprising a side skirt around a periphery of said lid, said side skirt circumscribing said integrated circuit chip and said substrate, electromagnetic interference (EMI) absorbing material being attached to an inner surface of said side skirt and at least a portion of an inner surface of said lid,

at least a portion of at least one of said first surface and said second surface of said substrate having EMI absorbing material directly connected thereto.

14. The method according to claim 13, further comprising:

providing a portion of EMI absorbing material contacting said printed circuit board; and

embedding a portion of said side skirt in said portion of EMI absorbing material.

15. The method according to claim 13, further comprising:

attaching a surface ground trap to a mounting surface of said printed circuit board.

16. The method according to claim 15, said surface ground trap being located in line with said side skirt.

17. The method according to claim 15, further comprising:

connecting an EMI radiation absorbing wall to said surface ground trap, said EMI radiation absorbing wall being positioned adjacent to said side skirt.

18. The method according to claim 13, further comprising:

depositing a fill material within a cavity formed between said lid and said substrate, said fill material comprising an EMI absorbing material.