Single wire serial interface utilizing count of encoded clock pulses with reset
First Claim
1. A power integrated circuit for controlling a light source, the power integrated circuit comprising:
- a counter that generates a count value based on pulses encoded in a signal received at a single input of the power integrated circuit;
output circuitry that outputs, via at least one output of the power integrated circuit, at least one lighting control state utilized to control the light source based at least in part on the count value; and
sensing circuitry that determines whether the signal is high or low so that (i) the at least one lighting control state is maintained while the signal is high, and (ii) the count value is reset in response to the signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of one of the pulses.
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Accused Products
Abstract
A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin.
108 Citations
29 Claims
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1. A power integrated circuit for controlling a light source, the power integrated circuit comprising:
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a counter that generates a count value based on pulses encoded in a signal received at a single input of the power integrated circuit; output circuitry that outputs, via at least one output of the power integrated circuit, at least one lighting control state utilized to control the light source based at least in part on the count value; and sensing circuitry that determines whether the signal is high or low so that (i) the at least one lighting control state is maintained while the signal is high, and (ii) the count value is reset in response to the signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of one of the pulses. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for controlling a light source with a power integrated circuit, the method comprising:
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generating a count value based on pulses encoded in a signal received via a single input of the power integrated circuit; outputting via at least one output of the power integrated circuit, at least one lighting control state utilized to control the light source based at least in part on the count value; maintaining the at least one lighting control state while the signal is at a high level; and resetting the count value in response to the signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of one of the pulses. - View Dependent Claims (10, 11, 12, 13)
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14. A method for controlling a light source using a power integrated circuit, the method comprising:
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receiving at a single input of the power integrated circuit a signal that is constantly high, constantly low, or toggling with a series of pulses, the series of pulses encoding a desired lighting control state; outputting via at least one output of the power integrated circuit a respective desired lighting control state; maintaining the respective desired lighting control state while the signal is constantly high for a duration in which the respective desired lighting control state is to remain unchanged; and resetting the desired lighting control state when the signal is constantly low for a duration that exceeds a predefined timeout period, the predefined timeout period being longer than a width of one of the series of pulses.
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15. A power integrated circuit for controlling a light source, the power integrated circuit comprising:
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a counter that generates a count value based on pulses encoded in a signal received at a single input of the power integrated circuit; a core portion configured to output via at least one output of the power integrated circuit a series of lighting control states, each lighting control state defining operational parameters for a light source based at least in part on the count value; and sensing circuitry that determines whether the signal is high or low so that (i) at least one of the series of lighting control states is maintained while the signal is high, and (ii) the count value is reset in response to the received signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of one of the pulses. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23)
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24. A power integrated circuit for controlling a light source, the power integrated circuit comprising:
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a counter that generates a count value based on pulses encoded in a signal received at a single input of the power integrated circuit, the signal having a first level and a second level, each of the pulses including a transition from the first level to the second level and a transition from the second level to the first level; output circuitry that outputs, via at least one output of the power integrated circuit, at least one lighting control state utilized to control the light source based at least in part on the count value; and sensing circuitry that determines whether the signal is at the first level or the second level so that (i) the at least one lighting control state is maintained while the signal is at the second level, and (ii) the count value is reset in response to the signal being at the first level for a period that exceeds a predetermined timeout value after a transition from the second level to the first level, the predetermined timeout value being longer than a width of one of the pulses. - View Dependent Claims (25, 26, 27, 28, 29)
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Specification