Adaptive reference tuning for endurance enhancement of non-volatile memories
First Claim
1. A method of operating a memory device, said method comprising:
- providing a memory device comprising a plurality of memory cells, a sensing circuit, a memory controller comprising a wear leveling circuit, a control logic block, and a look-up table;
randomizing location of data written into said plurality of memory cells employing said wear leveling circuit, a memory cell subject to plural write cycles applied to that memory cell;
determining an estimated number of cycling for said plurality of memory cells by counting a total number of cycling for at least one memory cell;
providing said estimated number of cycling to said look-up table, the look-up table for encoding a relationship between a value of a variable reference parameter associated with a measured physical quantity at said cell and a number of subjected said write cycles to said plurality of memory cells;
using said look-up table to return a value for a variable reference parameter that corresponds to said estimated number of cycling to said sensing circuit; and
determining, employing said sensing circuit and said returned value for said variable reference parameter, a state of a selected memory cell among said plurality of memory cells, said state determining including measuring the physical quantity employed in detecting a bit value of the selected memory cell, and comparing, by said sensing circuit, a value of a measured quantity from said selected memory cell with the returned variable reference parameter in the determining of the cell state.
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Accused Products
Abstract
A wear leveling technique is employed in a memory device so that the cycling history of a memory block is represented by the cycling history of a representative memory cell or a small number of representative memory cells. A control logic block tracks the cycling history of the one or more representative memory cells. A table tabulating the predicted shift in an optimal value for a reference variable for a sensing circuit as a function of cycling history is provided within the memory device. Prior to sensing a memory cell, the control logic block checks the total number of cycling in the one or more representative memory cells and adjusts the value for the reference variable in the sensing circuit, thereby providing an optimal value for the reference variable in the sensing circuit for each sensing cycle of the memory device.
1 Citation
11 Claims
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1. A method of operating a memory device, said method comprising:
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providing a memory device comprising a plurality of memory cells, a sensing circuit, a memory controller comprising a wear leveling circuit, a control logic block, and a look-up table; randomizing location of data written into said plurality of memory cells employing said wear leveling circuit, a memory cell subject to plural write cycles applied to that memory cell; determining an estimated number of cycling for said plurality of memory cells by counting a total number of cycling for at least one memory cell; providing said estimated number of cycling to said look-up table, the look-up table for encoding a relationship between a value of a variable reference parameter associated with a measured physical quantity at said cell and a number of subjected said write cycles to said plurality of memory cells; using said look-up table to return a value for a variable reference parameter that corresponds to said estimated number of cycling to said sensing circuit; and determining, employing said sensing circuit and said returned value for said variable reference parameter, a state of a selected memory cell among said plurality of memory cells, said state determining including measuring the physical quantity employed in detecting a bit value of the selected memory cell, and comparing, by said sensing circuit, a value of a measured quantity from said selected memory cell with the returned variable reference parameter in the determining of the cell state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification