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Multiple semiconductor device trenches per cell pitch

  • US 9,252,263 B1
  • Filed: 07/31/2014
  • Issued: 02/02/2016
  • Est. Priority Date: 07/31/2014
  • Status: Expired due to Fees
First Claim
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1. A semiconductor device, comprising:

  • a plurality of field plate trenches formed in a semiconductor substrate;

    a plurality of gate trenches formed in the semiconductor substrate and spaced apart from the field plate trenches; and

    a plurality of device cells having a cell pitch defined by a distance from one side of a field plate trench to the same side of an adjacent field plate trench, each device cell comprising a first doped region of a first conductivity type and a second doped region of a second conductivity type adjacent the first doped region in a part of the semiconductor substrate disposed between the adjacent field plate trenches that define the cell pitch,wherein at least some of the device cells have more than one gate trench per cell pitch,wherein at least some of the device cells that have more than one gate trench per cell pitch include only a single type of gate trench that comprises a gate conductor disposed in a gate trench.

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