Method of fabricating a light emitting diode display with integrated defect detection test

• US 9,252,375 B2
• Filed: 03/15/2013
• Issued: 02/02/2016
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: LuxVue Techonology Corporation (Apple Inc.)
• Inventors: Bibl, Andreas, Sakariya, Kapil V., Griggs, Charles R., Perkins, James Michael
• Primary Examiner(s): BAILEY, FREDERICK D
• Application Number:
  US13/842,925
• Publication Number:
  US 20140267683A1
• Time in Patent Office: 1,054 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/2401 Structure
• CPC Class Codes: H01L 2224/24011 Deposited, e.g. MCM-D type
• CPC Class Codes: H01L 2224/2405 Shape
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/245 Material
• CPC Class Codes: H01L 2224/29005 Structure
• CPC Class Codes: H01L 2224/29109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29113 Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/29118 Zinc [Zn] as principal constituent
• CPC Class Codes: H01L 2224/29124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/29139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/29144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/29147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/29155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/32014 : the layer connector being smaller than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/32057 : in side view
• CPC Class Codes: H01L 2224/32237 : the layer connector connecting to a bonding area disposed in a recess of the surface of the item
• CPC Class Codes: H01L 2224/32503 : comprising an intermetallic compound
• CPC Class Codes: H01L 2224/75252 : in the upper part of the bonding apparatus, e.g. in the bonding head
• CPC Class Codes: H01L 2224/75301 : Bonding head
• CPC Class Codes: H01L 2224/7565 : Means for transporting the components to be connected
• CPC Class Codes: H01L 2224/75725 : in the upper part of the bonding apparatus, e.g. in the bonding head
• CPC Class Codes: H01L 2224/759 : Means for monitoring the connection process
• CPC Class Codes: H01L 2224/7598 : specially adapted for batch processes
• CPC Class Codes: H01L 2224/82101 : by additive methods, e.g. direct writing
• CPC Class Codes: H01L 2224/82102 : using jetting, e.g. ink jet
• CPC Class Codes: H01L 2224/82104 : using screen printing
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/83005 : being a temporary or sacrificial substrate
• CPC Class Codes: H01L 2224/83192 : wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83193 : wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/83203 : Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/83805 : involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 2224/8381 : involving forming an intermetallic compound at the bonding interface
• CPC Class Codes: H01L 2224/83825 : Solid-liquid interdiffusion
• CPC Class Codes: H01L 2224/8383 : Solid-solid interdiffusion
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/24 : of an individual high density interconnect connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/75 : Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/82 : by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/156 : two-dimensional arrays
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/053 : Oxides composed of metals from groups of the periodic table
• CPC Class Codes: H01L 2924/0543 : 13th Group
• CPC Class Codes: H01L 2924/0544 : 14th Group
• CPC Class Codes: H01L 2924/0549 : being a combination of two or more materials provided in the groups H01L2924/0531 - H01L2924/0546
• CPC Class Codes: H01L 2924/0781 : being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H10K 50/00 : Organic light-emitting devices integrated devices or assemblies of multiple devices H10K59/00, H10K65/00; organic semiconductor lasers H01S5/36
• CPC Class Codes: H10K 59/10 : OLED displays
• CPC Class Codes: H10K 59/12 : Active-matrix OLED [AMOLED] displays

Abstract

A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

Claims

1. A method of forming a display panel comprising:

transferring an array of micro LED devices from one or more carrier substrates to a corresponding array of bottom electrodes within a corresponding array of subpixels on a display substrate;

imaging a surface of the display substrate with a camera to detect irregularities in the array of micro LED devices selected from the group consisting of missing micro LED devices and contaminated micro LED devices; and

forming a passivation layer material over a plurality of the irregularities to electrically insulate the plurality of the irregularities.

2. The method of claim 1, further comprising forming one or more top electrode layers in electrical contact with the array of micro LED devices without making electrical contact to the plurality of the irregularities.

3. The method of claim 1, wherein an image produced from the camera is used to detect missing micro LED devices.

4. The method of claim 1, wherein imaging the surface of the display substrate comprises:

illuminating the surface of the display substrate with a light source to cause the array of micro LED devices to fluoresce; and

imaging the fluorescence of the array of micro LED devices with the camera.

5. The method of claim 1, further comprising transferring a plurality of repair micro LED devices to the display substrate adjacent the plurality of the irregularities prior to forming the passivation layer material over the plurality of the irregularities.

6. The method of claim 5, further comprising forming one or more top electrode layers in electrical contact with the array of micro LED devices and the plurality of repair micro LED devices, wherein the one or more top electrode layers do not make electrical contact with the plurality of the irregularities.

7. The method of claim 1, wherein forming the passivation layer material over the plurality of the irregularities to electrically insulate the plurality of the irregularities comprises ink jet printing or screen printing.

8. The method of claim 2, wherein forming the one or more top electrode layers in electrical contact with the array of micro LED devices comprises ink jet printing or screen printing.

9. The method of claim 2, wherein forming the one or more top electrode layers comprises forming a plurality of separate top electrode layers in electrical contact with the array of micro LED devices.

10. The method of claim 9, further comprising scribing one of the separate top electrode layers to cut off an electrical path to a ground line.

11. A method of forming a display panel comprising:

transferring an array of micro LED device pairs from one or more carrier substrates to a corresponding array of bottom electrodes within a corresponding array of subpixels on a display substrate;

imaging a surface of the display substrate to detect irregularities in the array of micro LED device pairs; and

forming a passivation layer material over a plurality of the irregularities to electrically insulate the plurality of the irregularities.

12. The method of claim 11, further comprising forming one or more top electrode layers in electrical contact with the array of micro LED device pairs.

13. The method of claim 11, wherein transferring the array of micro LED device pairs comprises:

transferring a first array of micro LED devices from a first area on a first carrier substrate to the display substrate; and

transferring a second array of micro LED devices from a second area on the first carrier substrate to the display substrate.

14. The method of claim 13, wherein the second area does not overlap the first area.

15. The method of claim 11, wherein transferring the array of micro LED device pairs comprises:

transferring a first array of micro LED devices from a first carrier substrate to the display substrate; and

transferring a second array of micro LED devices from a second carrier substrate to the display substrate.

16. The method of claim 11, wherein transferring the array of micro LED device pairs comprises transferring each micro LED device with a separate electrostatic transfer head.

17. The method of claim 11, wherein imaging the surface of the display substrate comprises imaging the surface with a camera.

18. The method of claim 17, wherein an image produced from the camera is used to detect irregularities in the array of micro LED device pairs selected from the group consisting of missing micro LED devices and contaminated micro LED devices.

19. The method of claim 17, wherein the camera is a line scan camera.

20. The method of claim 17, wherein imaging the surface of the display substrate comprises:

illuminating the surface of the display substrate with a light source to cause the array of micro LED device pairs to fluoresce; and

imaging the fluorescence of the array of micro LED device pairs with the camera.

21. The method of claim 20, wherein an image produced from the camera is used to detect defective micro LED devices.

22. The method of claim 11, further comprising transferring a plurality of repair micro LED devices to the display substrate adjacent the plurality of the irregularities prior to forming the passivation layer material over the plurality of the irregularities.

23. The method of claim 22, further comprising forming one or more top electrode layers in electrical contact with the array of micro device pairs and the plurality of repair micro LED devices, wherein the one or more top electrode layers do not make electrical contact with the plurality of the irregularities.

24. The method of claim 12, wherein forming the one or more top electrode layers in electrical contact with the array of micro LED device pairs comprises forming a single top electrode layer over the array of micro LED device pairs, wherein the single top electrode layer does not make electrical contact with the detected irregularities in the array of micro LED device pairs.

25. The method of claim 12, wherein forming the one or more top electrode layers in electrical contact with the array of micro LED device pairs comprises forming a plurality of separate top electrode layers over the array of micro LED device pairs, wherein the plurality of separate top electrode layers do not make electrical contact with the detected irregularities in the array of micro LED device pairs.

26. The method of claim 25, wherein the plurality of separate top electrode layers are formed directly over the detected irregularities in the array of micro LED device pairs.

27. The method of claim 25, wherein the plurality of separate top electrode layers are not formed directly over the detected irregularities in the array of micro LED device pairs.