Distributed polyphase filter
First Claim
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1. An apparatus comprising:
- a clock generator to generate at least four differential clock signals; and
a distributed polyphase filter to obtain phase-corrected multi-phase clock signals based on the at least four differential clock signals, wherein the distributed polyphase filter comprises;
at least four inverters; and
for each differential clock signal of the at least four differential clock signals;
an input to receive the differential clock signal;
an output to provide a phase-corrected clock signal; and
a direct coupling between the input and the output, wherein the direct coupling does not include any of the at least four inverters.
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Abstract
In one embodiment, an apparatus includes a clock generator to generate differential clock signals. The apparatus also includes a distributed polyphase filter to obtain phase-corrected multi-phase clock signals based on the differential clock signals.
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Citations
22 Claims
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1. An apparatus comprising:
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a clock generator to generate at least four differential clock signals; and a distributed polyphase filter to obtain phase-corrected multi-phase clock signals based on the at least four differential clock signals, wherein the distributed polyphase filter comprises; at least four inverters; and for each differential clock signal of the at least four differential clock signals; an input to receive the differential clock signal; an output to provide a phase-corrected clock signal; and a direct coupling between the input and the output, wherein the direct coupling does not include any of the at least four inverters. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A system comprising:
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a system on a chip comprising at least one core having at least one execution unit and transmit logic, the transmit logic comprising; a clock generator to generate four or more differential clock signals; a distributed polyphase filter to obtain phase-corrected clock signals by phase-correcting the four or more differential clock signals, wherein the distributed polyphase filter comprises; at least four inverters; and for each differential clock signal of the four or more differential clock signals; an input to receive the differential clock signal; an output to provide a phase-corrected clock signal; and a direct coupling between the input and the output, wherein the direct coupling does not include any of the at least four inverters; and a wireless device coupled to the system on the chip via an interconnect, the interconnect used to communicate at least one data signal between the wireless device and the transmit logic of the system on the chip. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A method comprising:
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generating at least four differential clock signals; correcting, using a distributed polyphase filter, the at least four differential clock signals to obtain at least four phase-corrected multi-phase clock signals, wherein the distributed polyphase filter comprises; at least four inverters; and for each differential clock signal of the at least four differential clock signals; an input to receive the differential clock signal; an output to provide a phase-corrected clock signal; and a direct coupling between the input and the output, wherein the direct coupling does not include any of the at least four inverters; and recovering a plurality of differential data signals using the plurality of at least four phase-corrected multi-phase clock signals. - View Dependent Claims (18, 19, 20, 21, 22)
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Specification