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Dimensioning system

  • US 9,261,357 B2
  • Filed: 10/02/2014
  • Issued: 02/16/2016
  • Est. Priority Date: 05/10/2005
  • Status: Active Grant
First Claim
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1. A dimensioning system, comprising:

  • an electronic camera adapted to measure dimensions and a position of an object, the electronic camera including a three dimensional image output, a two dimensional imaging device having a two dimensional image output, a pulsed laser light source, a beam shaping element adapted to distribute light from said pulsed laser light source, a readout integrated circuit, a laser pulse sampler adapted to sample the output of said pulsed laser light source and produce a time zero reference connected to the readout integrated circuit, a lens system for collecting pulsed laser light reflected from said object, a focal plane array positioned at a focal plane of said lens system having a geometric arrangement of light sensitive detectors, each detector producing an electrical pulse response signal from an incident pulsed laser light signal, and each of said light sensitive detectors electrically connected to an input of a unit cell electrical circuit of the readout integrated circuit with the readout integrated circuit provides the time zero reference and a clock to each of the unit cell electrical circuits;

    a computer including a motion command output, the computer being connected to the three dimensional image output and to the two dimensional image output to determine an intended motion;

    wherein each unit cell electrical circuit includes;

    an input amplifier including an amplifier output connected to the inputs of a plurality of switches with each of the switches having an output connected to one of a plurality of memory capacitors;

    a logic element including a plurality of sequenced outputs that are connected to the control input of one of said switches and adapted to turn the one of said switches on and off in a predetermined sequence upon a transition of said clock producing a voltage comprising an analog sample of said electrical pulse response signal on each of the memory capacitors;

    a unit cell counter connected to the logic element that is adapted to count the number of analog samples taken following the time zero reference;

    a trigger circuit with an output connected to said logic element, the trigger circuit adapted to stop the analog sampling and the counting;

    a counter output connected to an input of a digital multiplexer resident on the readout integrated circuit; and

    a unit cell analog multiplexer having a plurality of inputs, that are each connected to one of said plurality of memory capacitors and an output connected to a global analog multiplexer of the readout integrated circuit, the global analog multiplexer having an analog output connected to an analog to digital converter adapted to convert the unit cell analog samples into digitized analog samples and the readout integrated circuit including a digital multiplexer output providing a digital output for a plurality of the unit cell counter outputs; and

    wherein the three dimensional image output corresponds to the unit cell counter outputs and the digitized analog samples taken by each unit cell electrical circuit.

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