Capcitive touch panel with simultaneously enabled X- and Y-direction sensor circuits wherein in each sensor circuit the drive line is interdigitated with a plurality of sense lines

• US 9,262,017 B2
• Filed: 06/04/2010
• Issued: 02/16/2016
• Est. Priority Date: 06/05/2009
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Kobayashi, Kazuyuki, Suzuki, Tatsuya, Fukai, Kumiko, Kaneta, Yasuhiro
• Primary Examiner(s): Nguyen, Chanh
• Assistant Examiner(s): LINGARAJU, NAVIN B
• Application Number:
  US12/794,281
• Publication Number:
  US 20100309165A1
• Time in Patent Office: 2,083 Days
• Field of Search: 345173-184, 178 1803- 1907
• US Class Current: 1/1
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

There is offered a signal processing circuit of the electrostatic capacity type touch panel which can eliminate duplication of components to reduce a cost of the components. A touch panel 51 is formed on a glass substrate 200. Sensor circuits 50A and 50B are arrayed in a Y direction, and sensor circuits 50C and 50D are arrayed in an X direction on the periphery of the touch pane 51. Serial clock terminals SCL of the sensor circuits 50A-50D are connected to a serial clock line 53 all together, while serial data terminals SDA are connected to a serial data line 54 all together. A microcomputer 52 is disposed on a PCB substrate outside the glass substrate 200. Data communication can be performed between the microcomputer 52 and the sensor circuits 50A-50D through the serial clock line 53 and the serial data line 54.

Claims

1. A signal processing circuit of an electrostatic capacity type touch panel, comprising:

a first sensor circuit having a first drive terminal and a plurality of first sensor input terminals, wherein the first sensor circuit provides a first driving signal at the drive terminal of the first sensor circuit;

a first plurality of sense lines disposed on a substrate, wherein a first sense line of the first plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the plurality of first sensor input terminals and a second sense line of the first plurality of sense lines has a first side, a second side, and a first terminal coupled to a second input terminal of the plurality of first sensor input terminals;

a first drive line comprising a first section having a first terminal, a second section having a second terminal, and a third section having a third terminal, the second terminal of the first drive line electrically separated from the third terminal of the first drive line, the first terminal of the first drive line coupled to the drive terminal of the first sensor circuit, the first section of the first drive line adjacent the first side of the first sense line of the first plurality of sense lines, the second section of the first drive line adjacent the second side of the first sense line of the first plurality of sense lines and first side of the second sense line of the first plurality of sense lines;

a second sensor circuit having a drive terminal and a plurality of second sensor input terminals, wherein the second sensor circuit provides a second driving signal at the drive terminal of the second sensor circuit;

a second plurality of sense lines disposed on the substrate and intersecting with the first plurality of sense lines, wherein a first sense line of the second plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the second plurality of sense lines;

a second drive line comprising a first section having a first terminal and a second section having a second terminal, the first terminal of the second drive line coupled to the drive terminal of the second sensor circuit, the first section of the second drive line adjacent the first side of the first sense line of the second plurality of sense lines, the second section of the first sense line adjacent the second side of the first sense line of the second plurality of sense lines, the second drive line electrically insulated from the first drive line, wherein the first sensor circuit provides a first driving signal on the first drive line and detects a change in a capacitance between one of the first sense line of the first plurality of sense lines or the second sense line of the first plurality of sense lines and the first drive line and outputting a first detection signal and produces a first digital value that indicates which one of the first plurality of sense lines at which the change in capacitance is detected and wherein the

second sensor circuit provides a second driving signal on the second drive line and detects a change in a capacitance between one of the first sense of the second plurality of sense lines or the second sense line of the second plurality of sense lines and the second drive line and outputting a second detection signal and produces a second digital value that indicates which one of the second plurality of sense lines at which the change in capacitance is detected; and

a bus connected to the first and second sensor circuits, the first and second sensor circuits outputting the first and second detection signals to the bus so that data communication is performed between a master device and the first and second sensor circuits through the bus;

wherein the master device enables the first and second sensor circuits simultaneously via a clock signal coupled to both the first and second sensor circuits, and wherein the master device reads the first and second digital values, respectively, from the first and second sensor circuits serially over the bus.

2. The signal processing circuit of claim 1, wherein the bus comprises an I²C bus.

3. The signal processing circuit of claim 1, further comprising:

a first drive circuit in the first sensor circuit that supplies a first alternating voltage to the first drive line; and

a second drive circuit in the second sensor circuit that supplies a second alternating voltage to the second drive line.

4. The signal processing circuit of claim 3, wherein the first and second alternating voltages are clock signals.

5. The signal processing circuit of claim 4, wherein the first sensor circuit has a first electric charge amplifier having an output based on a capacitance differential between two sense lines of the first plurality of sense lines and the second sensor has a second electric charge amplifier having an output based on a capacitance differential between two sense lines of the second plurality of sense lines, and wherein the digital value for each of the first and second sensor circuits is based on an output value of the electric charge amplifiers of the first and second sensor circuits, respectively.

6. The signal processing circuit of claim 1, wherein the substrate is glass, the first and second sensor circuits are formed on the glass using chip on glass mounting.

7. The signal processing circuit of claim 1, wherein the first plurality of sense lines comprises four sense lines, and the second plurality of sense lines comprises four sense lines.

8. The signal processing circuit of claim 1, further comprising:

a third sensor circuit having a third drive terminal and a plurality of third sensor input terminals, wherein the third sensor circuit provides a third driving signal at the drive terminal of the third sensor circuit;

a third plurality of sense lines oriented in parallel with the first plurality of sense lines, wherein a first sense line of the third plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the plurality of third sensor input terminals and a second sense line of the third plurality of sense lines has a first side, a second side, and a first terminal coupled to a second input terminal of the plurality of third sensor input terminals;

a third drive line comprising a first section having a first terminal, a second section having a second terminal, and a third section having a third terminal, the second terminal of the third drive line electrically separated from the third terminal of the third drive line, the first terminal of the third drive line coupled to the drive terminal of the third sensor circuit, the first section of the third drive line adjacent the first side of a third sense line of the third plurality of sense lines, the second section of the third drive line adjacent the second side of the first sense line of the third plurality of sense lines and first side of the second sense line of the third plurality of sense lines;

a fourth sensor circuit having a drive terminal and a plurality of fourth sensor input terminals, wherein the fourth sensor circuit provides a fourth driving signal at the drive terminal of the fourth sensor circuit;

a fourth plurality of sense lines disposed on the substrate, intersecting with the third plurality of sense lines, and oriented in parallel with the second plurality of sense lines, wherein a first sense line of the fourth plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the fourth plurality of sense lines;

a fourth drive line comprising a first section having a first terminal and a second section having a second terminal, the first terminal of the fourth drive line coupled to the drive terminal of the fourth sensor circuit, the first section of the fourth drive line adjacent the first side of the first sense line of the fourth plurality of sense lines, the second section of the fourth sense line adjacent the second side of the first sense line of the fourth plurality of sense lines, the fourth drive line electrically insulated from the first drive line, wherein

the third sensor circuit provides the third driving signal on the third drive line and detects a change in a capacitance between the first sense line of the third plurality of sense lines and the third drive line and outputting a third detection signal and produces a third digital value that indicates which one of the third plurality of sense lines at which the change in capacitance is detected and wherein the fourth sensor circuit provides the fourth driving signal on the fourth driving line and detects a change in a capacitance between the first sense line of the fourth plurality of sense lines and the fourth drive line and outputting a fourth detection signal and produces a fourth digital value that indicates which one of the fourth plurality of sense lines at which the change in capacitance is detected;

wherein the master device enables the third and fourth sensor circuits simultaneously with the first and second sensor circuits via the clock signal, and wherein the master device reads the third and fourth digital values, respectively, from the third and fourth sensor circuits serially over the bus in series with first and second sensor circuits.

9. A capacitance touch detection circuit arrangement, comprising:

a plurality of sense lines in a first direction and a plurality of sense lines in a second direction that intersect the plurality of sense lines in the first direction, wherein the plurality of sense lines in the first direction comprises;

a first set of sense lines and a second set of sense lines, wherein a first sense line of the first set of sense lines has a first side, a second side, and a first terminal and a first sense line of the second set of sense lines has a first side, a second side, and a first terminal; and

wherein the plurality of sense lines in the second direction comprises;

a third set of sense lines and a fourth set of sense lines, wherein a first sense line of the third set of sense lines has a first side, a second side, and a first terminal and a first sense line of the fourth set of sense lines has a first side, a second side, and a first terminal;

a first drive line having a first terminal and a portion divided into a plurality of branches, wherein each branch has a terminal, a first branch of the first drive line adjacent a first side of the first sense line of the first set of sense lines, a second branch of the first drive line adjacent a second side of the first sense line of the first set of sense lines;

a plurality of sensor circuits for the first direction and a plurality of sensor circuits for the second direction, the first terminal of the first sense line of the first set of sense lines coupled to a first sensor circuit of the plurality of sensor circuits for the first direction, the first terminal of the first sense line of the second set of sense lines coupled to a second sensor circuit of the plurality of sensor circuits for the first direction, the first terminal of the first sense line of the third set of sense lines coupled to a first sensor circuit of the plurality of sensor circuits for the second direction, the first terminal of the first sense line of the fourth set of sense lines coupled to a second sensor circuit of the plurality of sensor circuits for the second direction, the first terminal of the first drive line coupled to a drive terminal of the first sensor circuit of the plurality of sensor circuits for the first direction to receive a first drive signal, wherein the first sensor circuit of the plurality of sensor circuits for the first direction detects a change in capacitance between one of its sense lines of the first set of sense lines and the first drive line and produces a digital value that indicates whether, and which, one of the first set of sense lines at which a change in capacitance is detected;

a master device that enables the plurality of sensor circuits simultaneously with a clock signal, and wherein the master device reads the digital values of each of the plurality of sensor circuits serially over a bus, and based on the digital values determines a touch location.

10. The capacitance touch detection circuit arrangement of claim 9, wherein the bus is an I²C bus.

11. The capacitance touch detection circuit arrangement of claim 9, wherein the plurality of sense lines in the first and second directions are disposed on a glass substrate, each of the plurality of sensor circuits are mounted on the glass substrate by chip on glass.

12. The capacitance touch detection circuit arrangement of claim 9 where the first drive signal provided by the first sensor circuit of the plurality of sensor circuits is a clock signal.

13. The capacitance touch detection circuit arrangement of claim 9, wherein each sensor circuit comprises:

an electric charge amplifier having a first input, a second input, and an output;

a selection circuit that connects a first one of the first set of sense lines of the plurality of sense lines in the first direction to the first input of the electric charge amplifier and a third one of the first set of sense lines of the plurality of sense lines in the first direction to the second input of the electric charge amplifier during a first phase, and connects a second one of the first set of sense lines of the plurality of sense lines in the first direction to the first input of the electric charge amplifier and a fourth one of the first set of sense lines of the plurality of sense lines in the first direction to the second input of the electric charge amplifier during a second phase; and

an analog to digital converter that converts the output of the electric charge amplifier to a digital value for each of the first and second phases to produce the digital value.

14. The capacitance touch detection circuit arrangement of claim 9, wherein each sensor circuit comprises an electrically erasable programmable read only memory in which the digital value is stored.

15. The capacitance touch detection circuit arrangement of claim 9, wherein each sensor circuit comprises:

a reference voltage generation circuit that generates a reference voltage; and

a drive circuit that alternately connects the reference voltage to the drive line during a first phase and connects a ground to the drive line during a second phase.

16. A touch panel, comprising:

a substrate;

a first sensor circuit and a second sensor circuit, wherein the first sensor circuit is configured for sensing in a first direction and the second sensor circuit is configured for sensing in a second direction, wherein the first sensor circuit is connected to a first plurality of sense lines in the first direction and the first sensor circuit is connected to a first drive line, and the second sensor circuit is connected to a second plurality of sense lines in a second direction over the substrate and the second sensor circuit is connected to a second drive line, wherein the first plurality of sense lines in the first direction comprises;

a first set of sense lines, wherein a first sense line of the first set of sense lines has a first side, a second side, and a first terminal; and

wherein the second plurality of sense lines in the second direction comprises;

a second set of sense lines, wherein a first sense line of the second set of sense lines has a first side, a second side, and a first terminal; and

wherein the first drive line connected to the first sensor circuit has a first terminal and a portion divided into a plurality of branches, wherein each branch has a terminal, a first branch of the first drive line adjacent a first side of the first sense line of the first set of sense lines, a second branch of the first drive line adjacent a second side of the first sense line of the first set of sense lines, and wherein the terminals of each branch of the first drive line are electrically isolated from each other; and

wherein the second drive line connected to the second sensor circuit has a first terminal and a portion divided into a plurality of branches, wherein each branch has a terminal, a first branch of the second drive line adjacent a first side of the first sense line of the second set of sense lines, a second branch of the second drive line adjacent a second side of the first sense line of the second set of sense lines, and wherein the terminals of each branch of the second drive line are electrically isolated from each other;

a third sensor circuit and a fourth sensor circuit, wherein the third sensor circuit is configured for sensing in the first direction and the fourth sensor circuit is configured for sensing in the second direction, wherein the third sensor circuit is connected to a third plurality of sense lines in the first direction and the third sensor circuit is connected to a third drive line, wherein the third drive line connected to the third sensor circuit has a first terminal and a portion divided into a plurality of branches, wherein each branch has a terminal, and wherein the terminals of each branch of the third drive line are electrically isolated from each other, and the fourth sensor circuit is connected to a fourth plurality of sense lines in the second direction and the fourth sensor circuit is connected to a fourth drive line, wherein the fourth drive line connected to the fourth sensor circuit has a first terminal and a portion divided into a plurality of branches, wherein each branch has a terminal, and wherein the terminals of each branch of the fourth drive line are electrically isolated from each other;

wherein each of the at least first through fourth sensor circuits are simultaneously enabled by a master device to produce a digital value indicative of whether, and which, respective sense line to which it is connected indicates a change in capacitance, and wherein the master device reads the respective digital value of each sensor circuit serially.

17. The touch panel of claim 16, wherein the substrate is glass and each of the sensor circuits are mounted via chip on glass.

18. The touch panel of claim 16, wherein each sensor circuit is connected to four sense lines.

19. The touch panel of claim 18, wherein each sensor circuit includes an electric charge amplifier that compares a first and third sense line during a first phase, and compares a second and fourth sense line during a second phase.

20. The touch panel of claim 19, wherein each sensor circuit includes an adjustment circuit for adjusting an offset of the electric charge amplifier.