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Capcitive touch panel with simultaneously enabled X- and Y-direction sensor circuits wherein in each sensor circuit the drive line is interdigitated with a plurality of sense lines

  • US 9,262,017 B2
  • Filed: 06/04/2010
  • Issued: 02/16/2016
  • Est. Priority Date: 06/05/2009
  • Status: Active Grant
First Claim
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1. A signal processing circuit of an electrostatic capacity type touch panel, comprising:

  • a first sensor circuit having a first drive terminal and a plurality of first sensor input terminals, wherein the first sensor circuit provides a first driving signal at the drive terminal of the first sensor circuit;

    a first plurality of sense lines disposed on a substrate, wherein a first sense line of the first plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the plurality of first sensor input terminals and a second sense line of the first plurality of sense lines has a first side, a second side, and a first terminal coupled to a second input terminal of the plurality of first sensor input terminals;

    a first drive line comprising a first section having a first terminal, a second section having a second terminal, and a third section having a third terminal, the second terminal of the first drive line electrically separated from the third terminal of the first drive line, the first terminal of the first drive line coupled to the drive terminal of the first sensor circuit, the first section of the first drive line adjacent the first side of the first sense line of the first plurality of sense lines, the second section of the first drive line adjacent the second side of the first sense line of the first plurality of sense lines and first side of the second sense line of the first plurality of sense lines;

    a second sensor circuit having a drive terminal and a plurality of second sensor input terminals, wherein the second sensor circuit provides a second driving signal at the drive terminal of the second sensor circuit;

    a second plurality of sense lines disposed on the substrate and intersecting with the first plurality of sense lines, wherein a first sense line of the second plurality of sense lines has a first side, a second side, and a first terminal coupled to a first input terminal of the second plurality of sense lines;

    a second drive line comprising a first section having a first terminal and a second section having a second terminal, the first terminal of the second drive line coupled to the drive terminal of the second sensor circuit, the first section of the second drive line adjacent the first side of the first sense line of the second plurality of sense lines, the second section of the first sense line adjacent the second side of the first sense line of the second plurality of sense lines, the second drive line electrically insulated from the first drive line, wherein the first sensor circuit provides a first driving signal on the first drive line and detects a change in a capacitance between one of the first sense line of the first plurality of sense lines or the second sense line of the first plurality of sense lines and the first drive line and outputting a first detection signal and produces a first digital value that indicates which one of the first plurality of sense lines at which the change in capacitance is detected and wherein thesecond sensor circuit provides a second driving signal on the second drive line and detects a change in a capacitance between one of the first sense of the second plurality of sense lines or the second sense line of the second plurality of sense lines and the second drive line and outputting a second detection signal and produces a second digital value that indicates which one of the second plurality of sense lines at which the change in capacitance is detected; and

    a bus connected to the first and second sensor circuits, the first and second sensor circuits outputting the first and second detection signals to the bus so that data communication is performed between a master device and the first and second sensor circuits through the bus;

    wherein the master device enables the first and second sensor circuits simultaneously via a clock signal coupled to both the first and second sensor circuits, and wherein the master device reads the first and second digital values, respectively, from the first and second sensor circuits serially over the bus.

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