Semiconductor circuit, driving circuit of electro-optical device, and electronic apparatus
First Claim
Patent Images
1. An electro-optical substrate comprising:
- a scanning line;
a data line;
a pixel which is disposed at a position corresponding to an intersection of the scanning line and the data line;
a driving circuit which includes a first circuit block and a second circuit block;
a first power wiring line which is electrically connected to the first circuit block; and
a second power wiring line which is electrically connected to the second circuit block; and
a third power wiring line which is electrically connected to the first circuit block and the second circuit block,the first circuit block including at least one of a clock control circuit, a clock generating circuit, a unit shift circuit, a logic circuit, an inverter circuit and a transfer circuit,the second circuit block including at least one of a level shift circuit that amplifies a low-amplitude signal to a high-amplitude signal, a buffer circuit, a DA converter circuit and a LAT circuit,the first power wiring line having a first width and supplying a first potential to the first circuit block,the second power wiring line having a second width and supplying a second potential lower than the first potential to the second circuit blockthe third power wiring line having a third width and supplying a third potential higher than the first potential and the second potential to the first circuit block and the second circuit block, andthe first width of the first power wiring line being narrower than the second width of the second power wiring line.
1 Assignment
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Accused Products
Abstract
A semiconductor circuit includes a first circuit block, a second circuit block, and power wiring lines that supply a plurality of reference potentials. The first circuit block and the second circuit block are connected to a common power wiring line that is one of the power wiring lines and supplies a common reference potential. A width of the common power wiring line in the first circuit block is smaller than a width of the common power wiring line in the second circuit block.
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Citations
7 Claims
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1. An electro-optical substrate comprising:
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a scanning line; a data line; a pixel which is disposed at a position corresponding to an intersection of the scanning line and the data line; a driving circuit which includes a first circuit block and a second circuit block; a first power wiring line which is electrically connected to the first circuit block; and a second power wiring line which is electrically connected to the second circuit block; and a third power wiring line which is electrically connected to the first circuit block and the second circuit block, the first circuit block including at least one of a clock control circuit, a clock generating circuit, a unit shift circuit, a logic circuit, an inverter circuit and a transfer circuit, the second circuit block including at least one of a level shift circuit that amplifies a low-amplitude signal to a high-amplitude signal, a buffer circuit, a DA converter circuit and a LAT circuit, the first power wiring line having a first width and supplying a first potential to the first circuit block, the second power wiring line having a second width and supplying a second potential lower than the first potential to the second circuit block the third power wiring line having a third width and supplying a third potential higher than the first potential and the second potential to the first circuit block and the second circuit block, and the first width of the first power wiring line being narrower than the second width of the second power wiring line. - View Dependent Claims (2, 3)
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4. An electro-optical substrate comprising:
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a scanning line; a data line; a pixel which is disposed at a position corresponding to an intersection of the scanning line and the data line; a driving circuit which includes a first circuit block and a second circuit block; a first power wiring line which is electrically connected to the first circuit block; a second power wiring line which is electrically connected to the second circuit block; and a third power wiring line which is electrically connected to the first circuit block and the second circuit block, the first circuit block including at least one of a clock control circuit, a clock generating circuit, a unit shift circuit, a logic circuit, an inverter circuit and a transfer circuit, the second circuit block including at least one of a level shift circuit that amplifies a low-amplitude signal to a high-amplitude signal, a buffer circuit, a DA converter circuit and a LAT circuit, the first power wiring line extending along a first direction, having a first width from end to end along a second direction perpendicular to the first direction and supplying a first potential to the first circuit block, the second power wiring line extending along the first direction, having a second width from end to end along the second direction and supplying a second potential lower than the first potential to the second circuit block, the third power wiring line extending along the first direction, having a third width from end to end along the second direction and supplying a third potential higher than the first potential and the second potential to the first circuit block and the second circuit block, and the first width of the first power wiring line being narrower than the second width of the second power wiring line. - View Dependent Claims (5)
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6. An electro-optical substrate comprising:
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a scanning line; a data line; a pixel which is disposed at a position corresponding to an intersection of the scanning line and the data line; a driving circuit which includes a first circuit block and a second circuit block; a first power wiring line which is electrically connected to the first circuit block; a second power wiring line which is electrically connected to the second circuit block; and a third power wiring line which is electrically connected to the first circuit block and the second circuit block, the first circuit block having a first current consumption, the second circuit block having a second current consumption that is larger than the first consumption, the first power wiring line having a first width and supplying a first potential to the first circuit block, the second power wiring line having a second width and supplying a second potential lower than the first potential to the second circuit block, the third power wiring line having a third width and supplying a third potential higher than the first potential and the second potential to the first circuit block and the second circuit block, and the first width of the first power wiring line being narrower smaller than the second width of the second power wiring line. - View Dependent Claims (7)
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Specification
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Current Assignee138 East LCD Advancements Limited (Vector Capital Corporation)
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Original AssigneeEpson Imaging Devices Corporation (Seiko Group)
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InventorsKobashi, Yutaka, Toya, Takashi
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Primary Examiner(s)Patel, Kumar
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Assistant Examiner(s)CHOWDHURY, AFROZA Y
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Application NumberUS14/016,887Publication NumberTime in Patent Office896 DaysField of SearchUS Class Current1/1CPC Class CodesG09G 2300/0426 Layout of electrodes and co...G09G 2300/0814 used for selection purposes...G09G 2310/0286 Details of a shift register...G09G 2310/0289 Details of voltage level sh...G09G 2310/0291 Details of output amplifier...G09G 2310/08 Details of timing specific ...G09G 2330/02 Details of power systems an...G09G 3/3648 using an active matrix G09G...G09G 3/3677 suitable for active matrice...G09G 3/3688 suitable for active matrice...G09G 3/3696 Generation of voltages supp...G09G 5/00 Control arrangements or cir...
