Single wire serial interface

• US 9,265,113 B2
• Filed: 10/15/2014
• Issued: 02/16/2016
• Est. Priority Date: 03/28/2002
• Status: Expired due to Fees

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: d'Angelo, Kevin P., Brown, David Alan, So, John Sung K., Nilsson, Jan, Williams, Richard K.
• Primary Examiner(s): Bae, Ji H
• Application Number:
  US14/514,870
• Publication Number:
  US 20150028771A1
• Time in Patent Office: 489 Days
• Field of Search: None
• US Class Current: 1/1
• CPC Class Codes: G06F 1/04 Generating or distributing clock signals or signals derived directly therefrom
• CPC Class Codes: G06F 1/06 Clock generators producing several clock signals G06F1/08 - G06F1/14 take precedence
• CPC Class Codes: G06F 1/12 Synchronisation of different clock signals provided by a plurality of clock generators
• CPC Class Codes: G06F 1/22 Means for limiting or controlling the pin/gate ratio
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 13/4291 using a clocked protocol
• CPC Class Codes: G06F 9/4403 Processor initialisation
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3406 Control of illumination source illumination devices structurally associated with liquid crystal cells G02F1/1336
• CPC Class Codes: G09G 5/10 Intensity circuits
• CPC Class Codes: H05B 45/00 Circuit arrangements for operating light-emitting diodes [LED]
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/38 using boost topology
• CPC Class Codes: H05B 45/397 Current mirror circuits

Abstract

A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin.

Claims

1. A power integrated circuit device having at least one input and at least one output, comprising:

a core circuit that produces the at least one output of the power integrated circuit; and

an interface in communication with the core circuit, the interface including (i) counter circuitry that generates a count value based on pulses encoded in an input signal received via a single input of the power integrated circuit, (ii) latch driver circuitry that asserts a latch signal when the input signal is maintained high for a period that exceeds a predetermined latch timeout value, (iii) a latch that stores the count value based on the latch signal being asserted, (iv) decoder circuitry that associates the count value in the latch with a corresponding lighting control state that is communicated to a light source via the at least one output, and (v) sensing circuitry that determines whether the input signal is high or low so that the count value is maintained while the input signal is high, and the count value is reset in response to the input signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of one of the pulses.

2. The power integrated circuit of claim 1 wherein the latch maintains a prior lighting control state.

3. The power integrated circuit of claim 1 wherein the latch maintains a prior lighting control state until the count value has been accumulated.

4. The power integrated circuit of claim 1 wherein the core circuit controls at least in part a current associated with the at least one output.

5. The power integrated circuit of claim 1 wherein the core circuit controls at least in part a voltage associated with the at least one output.

6. The power integrated circuit of claim 1 wherein the core circuit includes LED driver circuitry that controls at least in part an LED current source associated with the at least one output.

7. The power integrated circuit of claim 1 wherein the core circuit provides a constant output based at least in part on the input signal being high.

8. The power integrated circuit of claim 1 further comprising boost converter control circuitry that controls at least in part boosting of the at least one output.

9. The power integrated circuit of claim 8 wherein the boost converter control circuitry controls at least in part boosting of a voltage associated with the at least one output.

10. The power integrated circuit of claim 1 wherein the power integrated circuit includes a multi-pin package, and the single input is associated with a single pin.

11. The power integrated circuit of claim 1 further comprising LED current source circuitry that controls at least in part an LED current source associated with the at least one output, and the lighting control state corresponding to one of a plurality of LED current source output levels.

12. The power integrated circuit of claim 1 wherein the counter circuitry controls at least in part a plurality of load switches.

13. The power integrated circuit of claim 12 wherein the plurality of load switches is implemented within the power integrated circuit.

14. The power integrated circuit of claim 1 wherein the counter circuitry controls at least in part one or more current limited load switches.

15. The power integrated circuit of claim 14 wherein the one or more current limited load switches is implemented within the power integrated circuit.

16. A power integrated circuit device having at least one input and at least one output, comprising:

a core circuit that produces the at least one output of the power integrated circuit; and

an interface in communication with the core circuit, the interface including (i) a counter that generates a count value based on pulses encoded on an input signal received via a single input of the power integrated circuit, the count value corresponding to a plurality of lighting control states that are each communicated to a light source via the at least one output and the plurality of lighting control states varying progressively based at least in part on the pulses, and (ii) sensing circuitry that determines whether the input signal is high or low so that at least one of the plurality of lighting control states is maintained while the input signal is high, and the count value is reset in response to the input signal being low for a period that exceeds a predetermined timeout value, the predetermined timeout value being longer than a width of at least one of the pulses.

17. The power integrated circuit of claim 16 wherein the core circuit outputs at least one of the plurality of lighting control states.

18. The power integrated circuit of claim 16 wherein the core circuit controls at least in part a voltage associated with the at least one output.

19. The power integrated circuit of claim 16 wherein the core circuit includes LED driver circuitry that controls at least in part an LED current source associated with the at least one output.

20. The power integrated circuit of claim 16 wherein the core circuit provides a constant output based at least in part on the input signal being high.

21. The power integrated circuit of claim 16 further comprising boost converter control circuitry that controls at least in part boosting of the at least one output.

22. The power integrated circuit of claim 16 further comprising boost converter control circuitry that controls at least in part boosting of a voltage associated with the at least one output.

23. The power integrated circuit of claim 16 wherein the power integrated circuit includes a multi-pin package, and the single input is associated with a single pin.

24. The power integrated circuit of claim 16 wherein at least one of the lighting control states corresponds to one of a plurality of LED current source output levels.

25. The power integrated circuit of claim 16 wherein the counter controls at least in part a plurality of load switches.

26. The power integrated circuit of claim 25 wherein the plurality of load switches is implemented within the power integrated circuit.

27. The power integrated circuit of claim 16 wherein the counter controls at least in part one or more current limited load switches.

28. The power integrated circuit of claim 27 wherein the one or more current limited load switches are implemented within the power integrated circuit.

29. The power integrated circuit of claim 16 wherein the core circuit outputs at least one of the plurality of lighting control states.

30. A power integrated circuit having at least one input and at least one output, comprising:

a core circuit that produces the at least one output of the power integrated circuit; and

an interface in communication with the core circuit, the interface including (i) counter circuitry that generates a count value based on pulses encoded in an input signal received via a single input of the power integrated circuit, the pulses including a transition from a first level to a second level and a transition from the second level to the first level, the count value corresponding to at least one of a plurality of lighting control states that are communicated to a light source via the at least one output, (ii) latch driver circuitry responsive to the input signal to produce a latch signal that is asserted in response to the input signal being maintained at the second level for a period that exceeds a predetermined latch timeout value, (iii) a latch that stores the count value based on the latch signal being asserted, and (iv) sensing circuitry that determines whether the input signal is at the first level or the second level so that at least one of the plurality of lighting control states is maintained while the input signal is at the second level, and the count value is reset in response to the input signal being at the first level for a period that exceeds a predetermined timeout value after a transition from the second level to the first level, the predetermined timeout value being longer than a width of one of the pulses.

31. The power integrated circuit of claim 30 wherein the core circuit controls at least in part a current associated with the at least one output.

32. The power integrated circuit of claim 30 wherein the core circuit controls at least in part a voltage associated via the at least one output.

33. The power integrated circuit of claim 30 wherein the core circuit includes LED driver circuitry that controls at least in part an LED current source associated with the at least one output.

34. The power integrated circuit of claim 30 wherein the core circuit provides a constant output based at least in part on the input signal being at the second level.

35. The power integrated circuit of claim 30 further comprising boost converter control circuitry that controls at least in part boosting the at least one output.

36. The power integrated circuit of claim 30 further comprising boost converter control circuitry that controls at least in part boosting a voltage associated with the at least one output.

37. The power integrated circuit of claim 30 wherein the power integrated circuit includes a multi-pin package, and the single input is associated with a single pin.

38. The power integrated circuit of claim 30 wherein the power integrated circuit device includes LED current source circuitry that controls an LED current source associated with the at least one output, and at least one of the plurality of lighting control states corresponds to one of a plurality of LED current source output levels.

39. The power integrated circuit of claim 30 wherein the counter circuitry controls at least in part a plurality of load switches.

40. The power integrated circuit of claim 39 wherein the plurality of load switches is implemented within the power integrated circuit.

41. The power integrated circuit of claim 30 wherein the counter circuitry controls one or more current limited load switches.

42. The power integrated circuit of claim 41 wherein the one or more current limited load switches is implemented within the power integrated circuit.

43. The power integrated circuit of claim 30 wherein the core circuit outputs at least one of the plurality of lighting control states.

44. A power integrated circuit having at least one input and at least one output, comprising:

a core circuit that produces the at least one output of the power integrated circuit; and

an interface in communication with the core circuit, the interface including (i) counter circuitry that generates a count value based on pulses encoded in an input signal received via a single input of the power integrated circuit, the pulses including a transition from a first level to a second level and a transition from the second level to the first level, the count value corresponding to a plurality of lighting control states that are communicated to a light source by the at least one output, the plurality of lighting control states varying progressively based at least in part on the pulses, and (ii) sensing circuitry that determines whether the input signal is at the first level or the second level so that at least one of the plurality of lighting control states is maintained while the input signal is at the second level, and the count value is reset in response to the input signal being at the first level for a period that exceeds a predetermined timeout value after a transition from the second level to the first level, the predetermined timeout value being longer than a width of one of the pulses.

45. The power integrated circuit of claim 44 wherein the core circuit outputs at least one of the plurality of lighting control states.

46. The power integrated circuit of claim 44 wherein the core circuit controls at least in part a voltage associated with the at least one output.

47. The power integrated circuit of claim 44 wherein the core circuit includes LED driver circuitry that controls at least in part an LED current source associated with the at least one output.

48. The power integrated circuit of claim 44 wherein the core circuit provides a constant output based at least in part on the input signal being at the second level.

49. The power integrated circuit of claim 44 further comprising boost converter control circuitry that controls at least in part boosting of the at least one output.

50. The power integrated circuit of claim 44 further comprising boost converter control circuitry that controls at least in part boosting a voltage associated with the at least one output.

51. The power integrated circuit of claim 44 wherein the power integrated circuit includes a multi-pin package, and the single input is implemented with a single pin.

52. The power integrated circuit of claim 44 wherein the power integrated circuit device includes LED current source circuitry that controls at least in part an LED current source, and at least one of the plurality of lighting control states corresponds to one of a plurality of LED current source output levels.

53. The power integrated circuit of claim 44 wherein the counter circuitry controls at least in part a plurality of load switches.

54. The power integrated circuit of claim 53 wherein the plurality of load switches are implemented within the power integrated circuit.

55. The power integrated circuit of claim 44 wherein the core circuit outputs at least one of the plurality of lighting control states.

56. The power integrated circuit of claim 53 wherein the counter circuitry controls one or more current limited load switches.

57. The power integrated circuit of claim 56 wherein the one or more current limited load switches is implemented within the power integrated circuit.