Radio frequency identification devices
First Claim
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1. A radio frequency identification (RFID) device comprising:
- a contactless internal voltage generator configured to generate a rectification voltage responsive to a radio frequency (RF) input signal and an internal voltage responsive to the generated rectification voltage and a reference voltage;
a clock generator configured to sense an amount of current to a sink path of the contactless internal voltage generator and to generate a clock signal using a variable resistance value, the variable resistance value based on the amount of current sensed; and
an internal circuit driven by the internal voltage and the clock signal,wherein the sink path is a current path of a current sinker in the contactless internal voltage generator.
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Abstract
Radio frequency identification (RFID) devices are provided including a contactless internal voltage generator configured to generate a rectification voltage responsive to a radio frequency (RF) input signal and an internal voltage responsive to the generated rectification voltage and a reference voltage; a clock generator configured to sense an amount of current to a sink path of the contactless internal voltage generator and to generate a clock signal using a variable resistance value, the variable resistance value based on the amount of current sensed; and an internal circuit driven by the internal voltage and the clock signal.
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14 Claims
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1. A radio frequency identification (RFID) device comprising:
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a contactless internal voltage generator configured to generate a rectification voltage responsive to a radio frequency (RF) input signal and an internal voltage responsive to the generated rectification voltage and a reference voltage; a clock generator configured to sense an amount of current to a sink path of the contactless internal voltage generator and to generate a clock signal using a variable resistance value, the variable resistance value based on the amount of current sensed; and an internal circuit driven by the internal voltage and the clock signal, wherein the sink path is a current path of a current sinker in the contactless internal voltage generator. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A radio frequency identification (RFID) device comprising:
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a contactless internal voltage generator configured to generate a rectification voltage responsive to an input of a radio frequency (RF) signal and an internal voltage based on the rectification voltage and a reference voltage in response to an enable signal; a contact internal voltage generator configured to generate the internal voltage based on a power supply voltage externally provided and the reference voltage in response to the enable signal; a power switch configured to generate the enable signal when one of the rectification voltage is generated and the power supply voltage is received; and a logic circuit driven by the internal voltage wherein the contactless internal voltage generator comprises; an RF rectifier configured to generate an induced voltage responsive to an input of the RF signal and to output the rectification voltage obtained by rectifying the induced voltage to a first node; a first PMOS transistor between the first node and a second node that outputs the internal voltage; a first NMOS transistor between the second node and a ground; a first comparator configured to output a first comparison value between the reference voltage and a first division voltage to a gate of the first PMOS transistor; and a second comparator configured to output a second comparison value between the reference voltage and a second division voltage to a gate of the first NMOS transistor, wherein the first division voltage is a division voltage of the rectification voltage via first resistors connected in series between the first node and a ground and the second division voltage is a division voltage of the internal voltage via second resistors connected in series between the second node and the ground; and wherein the contact internal voltage generator comprises a second PMOS transistor between a pad supplied with the power supply voltage and the second node; and a comparator configured to output a third comparison result between the reference voltage and a third division voltage to a gate of the second PMOS transistor, the third division voltage being a division voltage of the internal voltage via third resistors connected in series between the second node and a ground. - View Dependent Claims (14)
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Specification