Memory system, program method thereof, and computing system including the same

• US 9,275,742 B2
• Filed: 09/19/2014
• Issued: 03/01/2016
• Est. Priority Date: 04/30/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Jang, Jun-Ho, Choi, In-Hwan, Chung, Woon-Jae, Yoon, Song-Ho, Ye, Kyung-Wook
• Primary Examiner(s): Tran, Anthan
• Application Number:
  US14/491,156
• Publication Number:
  US 20150006802A1
• Time in Patent Office: 529 Days
• Field of Search: 365/185.03
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 11/5671 using charge trapping in an insulator
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

Disclosed is a memory system and a method of programming a multi-bit flash memory device which includes memory cells configured to store multi-bit data, where the method includes and the system is configured for determining whether data to be stored in a selected memory cell is an LSB data; and if data to be stored in a selected memory cell is not an LSB data, backing up lower data stored in the selected memory cell to a backup memory block of the multi-bit flash memory device.

Claims

1. A method of programming a multi-bit flash memory device which includes memory cells, each memory cell configured to store one or more data including at least either a lower page and or an upper page, the method comprising:

storing an LSB data of the lower page in a selected memory cell;

if data to be stored is assigned to the upper page in the selected memory cell, backing up the lower page data stored already in the selected memory cell to a backup memory block in the multi-bit flash memory device; and

copying the lower page data backed up in the backup memory block to a free memory block in the multi-bit flash memory device after a power failure to a memory block including the selected memory cell is detected,

wherein the free block is different from the memory block including the selected memory cell.

2. The method of claim 1, wherein the copying is made by one of a copy-back program operation or an iterative read and program operation.

3. The method of claim 1, including designating the backup memory block and the memory block to each be a free memory block in response to an erase operation.

4. The method of claim 1, wherein each of the memory cells stores 2-bit data.

5. The method of claim 1, wherein

if data to be stored in the selected memory block is meta data, after assigning at least one page affecting lower data to be a free page, then storing the meta data as a second data into only the lower page, starting from a next page of the at least one page;

if data to be stored in the selected memory block is a type of user data and if the user data is to be programmed as lower page data, storing the user data as a second data in the lower page;

if data to be stored in the selected memory block is the user data and if the user data is not to be programmed as lower page data, backing up the first data stored in the lower page of the selected memory block to a free memory block, before programming the user data.

6. The method of claim 5, wherein the free page does not store any data.

7. The method of claim 5, wherein the first data and the second data are the meta data.

8. The method of claim 5, wherein the first data and the second data are stored into word lines which are adjacent to each other.

9. The method of claim 5, wherein the first data and the second data are the user data.

10. The method of claim 1, further comprising after backing up the lower page data stored to the backup memory block, writing the data to the upper page as a MSB data.

11. The method of claim 10, further comprising during writing the data to the upper page as the MSB data, experiencing a power off the multi-bit flash memory device.

12. The method of claim 11, further comprising after experiencing the power off, powering on the multi-bit flash memory device and then the power failure to the memory block is detected.

13. The method of claim 1, wherein the copying is made by one of a copy-back program operation or an iterative read and program operation.

14. The method of claim 13, further comprising copying at least one valid page of the memory block to the free block.

15. The method of claim 14, further comprising erasing the memory block to be a free memory block in response to an erase operation.

16. A memory system comprising:

a multi-bit flash memory device including a plurality of memory blocks each configured to have memory cells; and

a memory controller configured to control the multi-bit flash memory device,

wherein the memory controller is configured to store an LSB data into a lower page in a selected memory cell and, if data to be stored is assigned to an upper page in the selected memory cell, to back up data of the lower page stored already in the selected memory cell to a backup memory block in the multi-bit flash memory device,

wherein the memory controller is further configured to copy data of the lower page backed up in the backup memory block to a free memory block in the multi-bit flash memory device after a power failure to a memory block including the selected memory cell is detected, and

wherein the free block is different from the memory block including the selected memory cell.

17. The memory system of claim 16, wherein the data to be stored in the selected memory cell is one of moving pictures and MP3.

18. The memory system of claim 16, wherein the data to be stored in the selected memory cell is a data to manage a user data.

19. The memory system of claim 16, wherein the data to be stored is a MSB data if each of the selected memory cells stores 2-bit data.

20. The memory system of claim 16, wherein the memory controller is further configured to, after backing up the lower page data stored to the backup memory block, write the data to the upper page as a MSB data.

21. The memory system of claim 20, wherein the memory controller is further configured to, write the data to the upper page as the MSB data, while experiencing a power off the multi-bit flash memory device.

22. The memory system of claim 21, wherein the memory controller is further configured to, after experiencing the power off, power on the multi-bit flash memory device and then detect the power failure to the memory block.

23. The memory system of claim 20, wherein the memory controller is configured to copy the data of lower page backed up in the backup memory block by one of a copy-back program operation or an iterative read and program operation.

24. The memory system of claim 23, wherein the memory controller is further configured to copy at least one valid page of the memory block to the free block.

25. The memory system of claim 24, wherein the memory controller is further configured to erase the memory block to be a free memory block in response to an erase operation.