Semiconductor device and manufacturing method thereof

• US 9,275,858 B2
• Filed: 06/19/2014
• Issued: 03/01/2016
• Est. Priority Date: 07/02/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): VU, HUNG K
• Application Number:
  US14/309,198
• Publication Number:
  US 20140302638A1
• Time in Patent Office: 621 Days
• Field of Search: 438/85, 438/86, 438/104, 438/149, 438/754
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/1037 and non-planar channel resulting from the gate electrode disposition, e.g. within a trench, H01L29/42356
• CPC Class Codes: H01L 29/2206 Amorphous materials
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming an insulating layer over a substrate having an insulating surface;

forming an island-shaped oxide semiconductor layer over the insulating layer;

forming a buffer layer having n-type conductivity over the island-shaped oxide semiconductor layer;

forming a metal layer over the buffer layer;

selectively etching the buffer layer and the metal layer to form a source region and a drain region over the island-shaped oxide semiconductor layer;

forming a gate insulating layer over the source region, the drain region, and the island-shaped oxide semiconductor layer; and

forming a gate electrode layer over the gate insulating layer to overlap with the island-shaped oxide semiconductor layer,

wherein the gate insulating layer is in contact with the island-shaped oxide semiconductor layer.

2. The method for manufacturing the semiconductor device according to claim 1, wherein the metal layer is any of a single film, an alloy film, and a layered film including any of the single film and the alloy film.

3. The method for manufacturing the semiconductor device according to claim 2, wherein each of the single film and the alloy film comprises an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten.

4. The method for manufacturing the semiconductor device according to claim 1, wherein the buffer layer comprises a metal oxide selected from indium oxide, indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, and tin zinc oxide, or a material comprising the metal oxide including one or more elements selected from aluminum, gallium, and silicon.

5. The method for manufacturing the semiconductor device according to claim 1, wherein the buffer layer comprises a material selected from titanium oxide, titanium niobium oxide, molybdenum oxide, tungsten oxide, magnesium oxide, calcium oxide, and gallium oxide.

6. The method for manufacturing the semiconductor device according to claim 1, wherein the island-shaped oxide semiconductor layer comprises at least one element selected from In, Ga, Sn, Zn, Al, Mg, Hf, and lanthanoid.

7. The method for manufacturing the semiconductor device according to claim 1, wherein the gate insulating layer contains oxygen.

8. The method for manufacturing the semiconductor device according to claim 1, wherein the metal layer provides steps over the buffer layer.

9. A method for manufacturing a semiconductor device, comprising the steps of:

forming an insulating layer over a substrate having an insulating surface;

forming an island-shaped oxide semiconductor layer over the insulating layer;

forming a buffer layer having n-type conductivity over the island-shaped oxide semiconductor layer;

forming a metal layer over the buffer layer;

selectively etching the buffer layer and the metal layer to form a source region and a drain region over the island-shaped oxide semiconductor layer;

forming a gate insulating layer over the source region, the drain region, and the island-shaped oxide semiconductor layer; and

forming a gate electrode layer over the gate insulating layer to overlap with the island-shaped oxide semiconductor layer,

wherein the gate insulating layer is in contact with the island-shaped oxide semiconductor layer, and

wherein the island-shaped oxide semiconductor layer has a groove portion.

10. The method for manufacturing the semiconductor device according to claim 9, wherein the metal layer is any of a single film, an alloy film, and a layered film including any of the single film and the alloy film.

11. The method for manufacturing the semiconductor device according to claim 10, wherein each of the single film and the alloy film comprises an element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten.

12. The method for manufacturing the semiconductor device according to claim 9, wherein the buffer layer comprises a metal oxide selected from indium oxide, indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, and tin zinc oxide, or a material comprising the metal oxide including one or more elements selected from aluminum, gallium, and silicon.

13. The method for manufacturing the semiconductor device according to claim 9, wherein the buffer layer comprises a material selected from titanium oxide, titanium niobium oxide, molybdenum oxide, tungsten oxide, magnesium oxide, calcium oxide, and gallium oxide.

14. The method for manufacturing the semiconductor device according to claim 9, wherein the island-shaped oxide semiconductor layer comprises at least one element selected from In, Ga, Sn, Zn, Al, Mg, Hf, and lanthanoid.

15. The method for manufacturing the semiconductor device according to claim 9, wherein the gate insulating layer contains oxygen.

16. The method for manufacturing the semiconductor device according to claim 9, wherein the metal layer provides steps over the buffer layer.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming an insulating layer over a substrate having an insulating surface;

forming an island-shaped oxide semiconductor layer over the insulating layer;

forming an n-type conductivity layer over the island-shaped oxide semiconductor layer;

forming a metal layer over the n-type conductivity layer;

selectively etching the n-type conductivity layer and the metal layer to form a source region and a drain region over the island-shaped oxide semiconductor layer;

forming a gate insulating layer over the source region, the drain region, and the island-shaped oxide semiconductor layer; and

forming a gate electrode layer over the gate insulating layer to overlap with the island-shaped oxide semiconductor layer,

wherein the gate insulating layer is in contact with the island-shaped oxide semiconductor layer, and

wherein inner side edges of the source region and the drain region are tapered.

18. The method for manufacturing the semiconductor device according to claim 17, wherein the metal layer is any of a single film, an alloy film, and a layered film including any of the single film and the alloy film.

19. The method for manufacturing the semiconductor device according to claim 17, wherein the n-type conductivity layer comprises a metal oxide selected from indium oxide, indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, and tin zinc oxide, or a material comprising the metal oxide including one or more elements selected from aluminum, gallium, and silicon.

20. The method for manufacturing the semiconductor device according to claim 17, wherein the buffer layer comprises a material selected from titanium oxide, titanium niobium oxide, molybdenum oxide, tungsten oxide, magnesium oxide, calcium oxide, and gallium oxide.

21. The method for manufacturing the semiconductor device according to claim 17, wherein the island-shaped oxide semiconductor layer comprises at least one element selected from In, Ga, Sn, Zn, Al, Mg, Hf, and lanthanoid.

22. The method for manufacturing the semiconductor device according to claim 17, wherein the gate insulating layer contains oxygen.